warp7: Set u-boot serial# based on OTP value
[oweals/u-boot.git] / board / warp7 / warp7.c
index 27e31f35d55e170bc8bfdb07866d4c6fe44c7fdb..327f656c44c646cf894550ebaabcca1bb505f930 100644 (file)
 #include <asm/arch/mx7-pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/io.h>
 #include <common.h>
 #include <fsl_esdhc.h>
+#include <i2c.h>
 #include <mmc.h>
 #include <asm/arch/crm_regs.h>
 #include <usb.h>
+#include <netdev.h>
+#include <power/pmic.h>
+#include <power/pfuze3000_pmic.h>
+#include "../freescale/common/pfuze.h"
+#include <asm/setup.h>
+#include <asm/bootm.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -25,6 +33,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW |    \
                        PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
 
+#define I2C_PAD_CTRL   (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
+       PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
+
+#ifdef CONFIG_SYS_I2C_MXC
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+/* I2C1 for PMIC */
+static struct i2c_pads_info i2c_pad_info1 = {
+       .scl = {
+               .i2c_mode = MX7D_PAD_I2C1_SCL__I2C1_SCL | PC,
+               .gpio_mode = MX7D_PAD_I2C1_SCL__GPIO4_IO8 | PC,
+               .gp = IMX_GPIO_NR(4, 8),
+       },
+       .sda = {
+               .i2c_mode = MX7D_PAD_I2C1_SDA__I2C1_SDA | PC,
+               .gpio_mode = MX7D_PAD_I2C1_SDA__GPIO4_IO9 | PC,
+               .gp = IMX_GPIO_NR(4, 9),
+       },
+};
+#endif
+
 int dram_init(void)
 {
        gd->ram_size = PHYS_SDRAM_SIZE;
@@ -85,17 +113,69 @@ int board_early_init_f(void)
        return 0;
 }
 
+#ifdef CONFIG_POWER
+#define I2C_PMIC       0
+static struct pmic *pfuze;
+int power_init_board(void)
+{
+       int ret;
+       unsigned int reg, rev_id;
+
+       ret = power_pfuze3000_init(I2C_PMIC);
+       if (ret)
+               return ret;
+
+       pfuze = pmic_get("PFUZE3000");
+       ret = pmic_probe(pfuze);
+       if (ret)
+               return ret;
+
+       pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg);
+       pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
+       printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
+
+       /* disable Low Power Mode during standby mode */
+       pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, 0x1);
+
+       return 0;
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+       int ret = 0;
+
+#ifdef CONFIG_USB_ETHER
+       ret = usb_eth_initialize(bis);
+       if (ret < 0)
+               printf("Error %d registering USB ether.\n", ret);
+#endif
+
+       return ret;
+}
+
 int board_init(void)
 {
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+       #ifdef CONFIG_SYS_I2C_MXC
+               setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+       #endif
+
        return 0;
 }
 
 int checkboard(void)
 {
-       puts("Board: WARP7\n");
+       char *mode;
+
+       if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
+               mode = "secure";
+       else
+               mode = "non-secure";
+
+       printf("Board: WARP7 in %s mode\n", mode);
 
        return 0;
 }
@@ -108,6 +188,10 @@ int board_usb_phy_mode(int port)
 int board_late_init(void)
 {
        struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+#ifdef CONFIG_SERIAL_TAG
+       struct tag_serialnr serialnr;
+       char serial_string[0x20];
+#endif
 
        imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 
@@ -119,5 +203,13 @@ int board_late_init(void)
         */
        clrsetbits_le16(&wdog->wcr, 0, 0x10);
 
+#ifdef CONFIG_SERIAL_TAG
+       /* Set serial# standard environment variable based on OTP settings */
+       get_board_serial(&serialnr);
+       snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
+                serialnr.low, serialnr.high);
+       env_set("serial#", serial_string);
+#endif
+
        return 0;
 }