riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL

[oweals/u-boot.git] / board / ve8313 / ve8313.c

diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index f0fc1fe3b31d8097661e9ef29a02bfa21d0627ac..d1c9535f46ead79e4f79139376cbb0a74391d199 100644 (file)
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
+#include <init.h>
 #include <linux/libfdt.h>
 #include <pci.h>
 #include <mpc83xx.h>
@@ -38,7 +40,7 @@ static long fixed_sdram(void)
        u32 msize_log2 = __ilog2(msize);
 
        out_be32(&im->sysconf.ddrlaw[0].bar,
-               (CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000));
+               (CONFIG_SYS_SDRAM_BASE & 0xfffff000));
        out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1)));
        out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE);
 
@@ -48,12 +50,12 @@ static long fixed_sdram(void)
         */
        __udelay(50000);
 
-#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0)
+#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
 #warning Chip select bounds is only configurable in 16MB increments
 #endif
        out_be32(&im->ddr.csbnds[0].csbnds,
-               ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
-               (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
+               ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
+               (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
                        CSBNDS_EA));
        out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG);
 
@@ -80,7 +82,7 @@ static long fixed_sdram(void)
 
        /* now check the real size */
        disable_addr_trans ();
-       msize = get_ram_size (CONFIG_SYS_DDR_BASE, msize);
+       msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, msize);
        enable_addr_trans ();
 #endif
 
@@ -100,8 +102,8 @@ int dram_init(void)
        msize = fixed_sdram();
 
        /* Local Bus setup lbcr and mrtpr */
-       out_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
-       out_be32(&lbc->mrtpr, CONFIG_SYS_LBC_MRTPR);
+       out_be32(&lbc->lbcr, 0x00040000);
+       out_be32(&lbc->mrtpr, 0x20000000);
        sync();
 
        /* return total bus SDRAM size(bytes)  -- DDR */