riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL

[oweals/u-boot.git] / board / ve8313 / ve8313.c

diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 2272ff0c34cb50a59e9602a24b073d45410d29fd..d1c9535f46ead79e4f79139376cbb0a74391d199 100644 (file)
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
  *
@@ -5,28 +6,12 @@
  *
  * (C) Copyright 2010
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <mpc83xx.h>
 #include <ns16550.h>
@@ -55,7 +40,7 @@ static long fixed_sdram(void)
        u32 msize_log2 = __ilog2(msize);
 
        out_be32(&im->sysconf.ddrlaw[0].bar,
-               (CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000));
+               (CONFIG_SYS_SDRAM_BASE & 0xfffff000));
        out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1)));
        out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE);
 
@@ -65,8 +50,14 @@ static long fixed_sdram(void)
         */
        __udelay(50000);
 
-       out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24);
-       out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CONFIG);
+#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
+#warning Chip select bounds is only configurable in 16MB increments
+#endif
+       out_be32(&im->ddr.csbnds[0].csbnds,
+               ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
+               (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
+                       CSBNDS_EA));
+       out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG);
 
        /* Currently we use only one CS, so disable the other bank. */
        out_be32(&im->ddr.cs_config[1], 0);
@@ -91,14 +82,14 @@ static long fixed_sdram(void)
 
        /* now check the real size */
        disable_addr_trans ();
-       msize = get_ram_size (CONFIG_SYS_DDR_BASE, msize);
+       msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, msize);
        enable_addr_trans ();
 #endif
 
        return msize;
 }
 
-phys_size_t initdram(int board_type)
+int dram_init(void)
 {
        volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
        volatile fsl_lbc_t *lbc = &im->im_lbc;
@@ -111,12 +102,14 @@ phys_size_t initdram(int board_type)
        msize = fixed_sdram();
 
        /* Local Bus setup lbcr and mrtpr */
-       out_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
-       out_be32(&lbc->mrtpr, CONFIG_SYS_LBC_MRTPR);
+       out_be32(&lbc->lbcr, 0x00040000);
+       out_be32(&lbc->mrtpr, 0x20000000);
        sync();
 
        /* return total bus SDRAM size(bytes)  -- DDR */
-       return msize;
+       gd->ram_size = msize;
+
+       return 0;
 }
 
 #define VE8313_WDT_EN  0x00020000
@@ -184,7 +177,6 @@ void pci_init_board(void)
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
        struct pci_region *reg[] = { pci_regions };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        setbits_be32(&clk->occr, 0xe0000000);
@@ -198,18 +190,18 @@ void pci_init_board(void)
        out_be32(&pci_law[1].bar, CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR);
        out_be32(&pci_law[1].ar, LBLAWAR_EN | LBLAWAR_1MB);
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 }
 #endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, bd_t *bd)
 {
        ft_cpu_setup(blob, bd);
 #ifdef CONFIG_PCI
        ft_pci_setup(blob, bd);
 #endif
+
+       return 0;
 }
 #endif