ppc4xx: lwmon5: Change PHY reset sequence for PHY MDIO address latching

[oweals/u-boot.git] / board / tqm834x / tqm834x.c

diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index 9c35e22c8e10ec556400513c4d0aa5f143804fa4..7d0b0554840e1edadb03ed130692b9b814f06441 100644 (file)
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -114,7 +114,7 @@ long int initdram (int board_type)
        /* enable DDR controller */
        im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR);
+               SDRAM_CFG_SDRAM_TYPE_DDR1);
        SYNC;
 
        /* size detection */
@@ -388,7 +388,7 @@ static void set_ddr_config(void) {
        /* don't enable DDR controller yet */
        im->ddr.sdram_cfg =
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR;
+               SDRAM_CFG_SDRAM_TYPE_DDR1;
        SYNC;
 
        /* Set SDRAM mode */