ppc4xx: lwmon5: Change PHY reset sequence for PHY MDIO address latching

[oweals/u-boot.git] / board / tqm834x / tqm834x.c

diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index 36d901f094255bec9910916e3972192f7e388fbf..7d0b0554840e1edadb03ed130692b9b814f06441 100644 (file)
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -114,7 +114,7 @@ long int initdram (int board_type)
        /* enable DDR controller */
        im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR);
+               SDRAM_CFG_SDRAM_TYPE_DDR1);
        SYNC;
 
        /* size detection */
@@ -148,14 +148,14 @@ int checkboard (void)
        u32 w, f;
 
        immr = (immap_t *)CFG_IMMR;
-       if (!(immr->reset.rcwh & RCWH_PCIHOST)) {
+       if (!(immr->reset.rcwh & HRCWH_PCI_HOST)) {
                printf("PCI:   NOT in host mode..?!\n");
                return 0;
        }
 
        /* get bus width */
        w = 32;
-       if (immr->reset.rcwh & RCWH_PCI64)
+       if (immr->reset.rcwh & HRCWH_64_BIT_PCI)
                w = 64;
 
        /* get clock */
@@ -388,7 +388,7 @@ static void set_ddr_config(void) {
        /* don't enable DDR controller yet */
        im->ddr.sdram_cfg =
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR;
+               SDRAM_CFG_SDRAM_TYPE_DDR1;
        SYNC;
 
        /* Set SDRAM mode */