*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
-#include <asm/immap_fsl_pci.h>
+#include <asm/fsl_pci.h>
#include <asm/io.h>
#include <ioports.h>
#include <flash.h>
/* Monitor protection ON by default */
flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_MONITOR_BASE, 0xffffffff,
&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
/* Environment protection ON by default */
/* Redundant environment protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CONFIG_ENV_ADDR_REDUND,
- CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+ CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
#endif
{
volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
sys_info_t sys_info;
- ulong clkdiv = lbc->lcrr & 0x0f;
+ ulong clkdiv = lbc->lcrr & LCRR_CLKDIV;
get_sys_info (&sys_info);
* Errata LBC11.
* Fix Local Bus clock glitch when DLL is enabled.
*
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
+ * If localbus freq is < 66MHz, DLL bypass mode must be used.
+ * If localbus freq is > 133MHz, DLL can be safely enabled.
* Between 66 and 133, the DLL is enabled with an override workaround.
*/
*/
static int first_free_busno;
-#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
+#ifdef CONFIG_PCI1
static struct pci_controller pci1_hose;
-#endif /* CONFIG_PCI || CONFIG_PCI1 */
+#endif /* CONFIG_PCI1 */
#ifdef CONFIG_PCIE1
static struct pci_controller pcie1_hose;
static inline void init_pci1(void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
+#ifdef CONFIG_PCI1
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CONFIG_SYS_PCI1_ADDR;
- extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pci1_hose;
+ struct pci_region *r = hose->regions;
/* PORDEVSR[15] */
uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;
/* inbound */
- pci_set_region (hose->regions + 0,
- CONFIG_SYS_PCI_MEMORY_BUS,
- CONFIG_SYS_PCI_MEMORY_PHYS,
- CONFIG_SYS_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
+ r += fsl_pci_setup_inbound_windows(r);
/* outbound memory */
- pci_set_region (hose->regions + 1,
+ pci_set_region (r++,
CONFIG_SYS_PCI1_MEM_BASE,
CONFIG_SYS_PCI1_MEM_PHYS,
CONFIG_SYS_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
- pci_set_region (hose->regions + 2,
+ pci_set_region (r++,
CONFIG_SYS_PCI1_IO_BASE,
CONFIG_SYS_PCI1_IO_PHYS,
CONFIG_SYS_PCI1_IO_SIZE,
PCI_REGION_IO);
- hose->region_count = 3;
+ hose->region_count = r - hose->regions;
hose->first_busno = first_free_busno;
- pci_setup_indirect (hose, (int)&pci->cfg_addr,
- (int)&pci->cfg_data);
- fsl_pci_init (hose);
+ fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
printf (" PCI on bus %02x..%02x\n",
hose->first_busno, hose->last_busno);
first_free_busno = hose->last_busno + 1;
#ifdef CONFIG_PCIX_CHECK
- if (!(gur->pordevsr & PORDEVSR_PCI)) {
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) {
ushort reg16 =
PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ |
PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
} else {
puts ("PCI1: disabled\n");
}
-#else /* !(CONFIG_PCI || CONFIG_PCI1) */
+#else /* !CONFIG_PCI1 */
gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
-#endif /* CONFIG_PCI || CONFIG_PCI1) */
+#endif /* CONFIG_PCI1 */
}
static inline void init_pcie1(void)
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CONFIG_SYS_PCIE1_ADDR;
- extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = (host_agent == 0) || (host_agent == 2 ) ||
(host_agent == 3);
+ struct pci_region *r = hose->regions;
int pcie_configured = io_sel >= 1;
puts ("\n");
/* inbound */
- pci_set_region (hose->regions + 0,
- CONFIG_SYS_PCI_MEMORY_BUS,
- CONFIG_SYS_PCI_MEMORY_PHYS,
- CONFIG_SYS_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ r += fsl_pci_setup_inbound_windows(r);
/* outbound memory */
- pci_set_region (hose->regions + 1,
+ pci_set_region (r++,
CONFIG_SYS_PCIE1_MEM_BASE,
CONFIG_SYS_PCIE1_MEM_PHYS,
CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
- pci_set_region (hose->regions + 2,
+ pci_set_region (r++,
CONFIG_SYS_PCIE1_IO_BASE,
CONFIG_SYS_PCIE1_IO_PHYS,
CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
- hose->region_count = 3;
+ hose->region_count = r - hose->regions;
hose->first_busno = first_free_busno;
- pci_setup_indirect(hose, (int)&pci->cfg_addr,
- (int)&pci->cfg_data);
- fsl_pci_init (hose);
+ fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
printf (" PCIe on bus %02x..%02x\n",
hose->first_busno, hose->last_busno);
#ifdef CONFIG_OF_BOARD_SETUP
void ft_board_setup (void *blob, bd_t *bd)
{
- int node, tmp[2];
- const char *path;
-
ft_cpu_setup (blob, bd);
- node = fdt_path_offset (blob, "/aliases");
- tmp[0] = 0;
- if (node >= 0) {
-#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
- path = fdt_getprop (blob, node, "pci0", NULL);
- if (path) {
- tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
- do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1);
- }
-#endif /* CONFIG_PCI || CONFIG_PCI1 */
+#ifdef CONFIG_PCI1
+ ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
+#endif
#ifdef CONFIG_PCIE1
- path = fdt_getprop (blob, node, "pci1", NULL);
- if (path) {
- tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
- do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1);
- }
-#endif /* CONFIG_PCIE1 */
- }
+ ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
+#endif
}
#endif /* CONFIG_OF_BOARD_SETUP */
projects / oweals / u-boot.git / blobdiff