Merge git://git.denx.de/u-boot-fsl-qoriq

[oweals/u-boot.git] / board / ti / ks2_evm / board_k2l.c

diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 2c433ee01a7feac932a39bbd6a2d31980c70124b..c65f33131da0cf21f4a654fac81188004b7581fc 100644 (file)
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -14,21 +14,38 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-unsigned int external_clk[ext_clk_count] = {
-       [sys_clk]       = 122880000,
-       [alt_core_clk]  = 100000000,
-       [pa_clk]        = 122880000,
-       [tetris_clk]    = 122880000,
-       [ddr3_clk]      = 100000000,
-       [pcie_clk]      = 100000000,
-       [sgmii_clk]     = 156250000,
-       [usb_clk]       = 100000000,
-};
+unsigned int get_external_clk(u32 clk)
+{
+       unsigned int clk_freq;
+
+       switch (clk) {
+       case sys_clk:
+               clk_freq = 122880000;
+               break;
+       case alt_core_clk:
+               clk_freq = 100000000;
+               break;
+       case pa_clk:
+               clk_freq = 122880000;
+               break;
+       case tetris_clk:
+               clk_freq = 122880000;
+               break;
+       case ddr3a_clk:
+               clk_freq = 100000000;
+               break;
+       default:
+               clk_freq = 0;
+               break;
+       }
+
+       return clk_freq;
+}
 
-static struct pll_init_data core_pll_config[] = {
-       CORE_PLL_799,
-       CORE_PLL_1000,
-       CORE_PLL_1198,
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+       [SPD800]        = CORE_PLL_799,
+       [SPD1000]       = CORE_PLL_1000,
+       [SPD1200]       = CORE_PLL_1198,
 };
 
 s16 divn_val[16] = {
@@ -36,16 +53,40 @@ s16 divn_val[16] = {
 };
 
 static struct pll_init_data tetris_pll_config[] = {
-       TETRIS_PLL_799,
-       TETRIS_PLL_1000,
-       TETRIS_PLL_1198,
-       TETRIS_PLL_1352,
-       TETRIS_PLL_1401,
+       [SPD800]        = TETRIS_PLL_799,
+       [SPD1000]       = TETRIS_PLL_1000,
+       [SPD1200]       = TETRIS_PLL_1198,
+       [SPD1350]       = TETRIS_PLL_1352,
+       [SPD1400]       = TETRIS_PLL_1401,
 };
 
 static struct pll_init_data pa_pll_config =
        PASS_PLL_983;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed(speeds);
+               data = &core_pll_config[speed];
+               break;
+       case TETRIS_PLL:
+               speed = get_max_arm_speed(speeds);
+               data = &tetris_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -54,6 +95,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 0,
                .slave_port      = 1,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2L_EMAC1",
@@ -61,6 +103,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 1,
                .slave_port      = 2,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2L_EMAC2",
@@ -68,6 +111,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 2,
                .slave_port      = 3,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2L_EMAC3",
@@ -75,6 +119,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 3,
                .slave_port      = 4,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
 };
 
@@ -87,28 +132,25 @@ int get_num_eth_ports(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-       int speed;
+       init_plls();
 
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
-
-       init_pll(&pa_pll_config);
+       return 0;
+}
+#endif
 
-       speed = get_max_arm_speed();
-       init_pll(&tetris_pll_config[speed]);
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
+{
+       if (!strcmp(name, "keystone-k2l-evm"))
+               return 0;
 
-       return 0;
+       return -1;
 }
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
-       CORE_PLL_799,
-       TETRIS_PLL_491,
-};
-
 void spl_init_keystone_plls(void)
 {
-       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+       init_plls();
 }
 #endif