Merge git://git.denx.de/u-boot-fsl-qoriq
[oweals/u-boot.git] / board / ti / ks2_evm / board_k2hk.c
index b9e2b07b8ae6c15472f7d22929f99ecf4707c01c..e99e6355b477610587698c673081efc7b41cb0bf 100644 (file)
@@ -21,14 +21,39 @@ unsigned int external_clk[ext_clk_count] = {
        [tetris_clk]    =       125000000,
        [ddr3a_clk]     =       100000000,
        [ddr3b_clk]     =       100000000,
-       [mcm_clk]       =       312500000,
-       [pcie_clk]      =       100000000,
-       [sgmii_srio_clk] =      156250000,
-       [xgmii_clk]     =       156250000,
-       [usb_clk]       =       100000000,
-       [rp1_clk]       =       123456789
 };
 
+unsigned int get_external_clk(u32 clk)
+{
+       unsigned int clk_freq;
+
+       switch (clk) {
+       case sys_clk:
+               clk_freq = 122880000;
+               break;
+       case alt_core_clk:
+               clk_freq = 125000000;
+               break;
+       case pa_clk:
+               clk_freq = 122880000;
+               break;
+       case tetris_clk:
+               clk_freq = 125000000;
+               break;
+       case ddr3a_clk:
+               clk_freq = 100000000;
+               break;
+       case ddr3b_clk:
+               clk_freq = 100000000;
+               break;
+       default:
+               clk_freq = 0;
+               break;
+       }
+
+       return clk_freq;
+}
+
 static struct pll_init_data core_pll_config[NUM_SPDS] = {
        [SPD800]        = CORE_PLL_799,
        [SPD1000]       = CORE_PLL_999,
@@ -57,11 +82,11 @@ struct pll_init_data *get_pll_init_data(int pll)
 
        switch (pll) {
        case MAIN_PLL:
-               speed = get_max_dev_speed();
+               speed = get_max_dev_speed(speeds);
                data = &core_pll_config[speed];
                break;
        case TETRIS_PLL:
-               speed = get_max_arm_speed();
+               speed = get_max_arm_speed(speeds);
                data = &tetris_pll_config[speed];
                break;
        case PASS_PLL:
@@ -82,6 +107,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 0,
                .slave_port     = 1,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC1",
@@ -89,6 +115,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 1,
                .slave_port     = 2,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC2",
@@ -96,6 +123,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 2,
                .slave_port     = 3,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC3",
@@ -103,6 +131,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 3,
                .slave_port     = 4,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
 };
 
@@ -121,6 +150,16 @@ int board_early_init_f(void)
 }
 #endif
 
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
+{
+       if (!strcmp(name, "keystone-k2hk-evm"))
+               return 0;
+
+       return -1;
+}
+#endif
+
 #ifdef CONFIG_SPL_BUILD
 void spl_init_keystone_plls(void)
 {