ARMV7: OMAP3: Update Beagle xM pinmux with USB hub and DVI gpio setup

[oweals/u-boot.git] / board / ti / beagle / beagle.h

diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 7fe6275e379b74b0bb4b601f699c38dd9fc8780c..ec0da6d745477437c1c776db7929690e1e568437 100644 (file)
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -33,7 +33,11 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
-#define BOARD_REVISION_MASK    (0x1 << 11)
+/* BeagleBoard revisions */
+#define REVISION_AXBX  0x7
+#define REVISION_CX    0x6
+#define REVISION_C4    0x5
+#define REVISION_XM    0x0
 
 /*
  * IEN  - Input Enable
@@ -264,7 +268,7 @@ const omap3_sysinfo sysinfo = {
        MUX_VAL(CP(HDQ_SIO),            (IDIS | PTU | EN  | M4)) /*GPIO_170*/\
        MUX_VAL(CP(MCSPI1_CLK),         (IEN  | PTU | EN  | M4)) /*GPIO_171*/\
        MUX_VAL(CP(MCSPI1_SIMO),        (IEN  | PTU | EN  | M4)) /*GPIO_172*/\
-       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTD | DIS | M0)) /*McSPI1_SOMI*/\
+       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTU | EN  | M4)) /*GPIO_173*/\
        MUX_VAL(CP(MCSPI1_CS0),         (IEN  | PTD | EN  | M0)) /*McSPI1_CS0*/\
        MUX_VAL(CP(MCSPI1_CS1),         (IDIS | PTD | EN  | M0)) /*McSPI1_CS1*/\
        MUX_VAL(CP(MCSPI1_CS2),         (IDIS | PTD | DIS | M4)) /*GPIO_176*/\
@@ -374,11 +378,41 @@ const omap3_sysinfo sysinfo = {
        MUX_VAL(CP(SDRC_CKE1),          (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
 #define MUX_BEAGLE_C() \
-       MUX_VAL(CP(MCBSP3_DX),          (IEN | PTD | DIS | M4)) /*GPIO_140*/\
-       MUX_VAL(CP(MCBSP3_DR),          (IEN | PTD | DIS | M4)) /*GPIO_142*/\
-       MUX_VAL(CP(MCBSP3_CLKX),        (IEN | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
        MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
        MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
        MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/
 
+#define MUX_BEAGLE_XM() \
+       MUX_VAL(CP(GPMC_NCS5),          (IDIS | PTD | EN  | M4)) /*GPIO_56*/\
+       MUX_VAL(CP(GPMC_WAIT0),         (IDIS | PTU | EN  | M4)) /*GPIO_63*/\
+       MUX_VAL(CP(MMC1_DAT7),          (IDIS | PTU | EN  | M4)) /*GPIO_129*/\
+       MUX_VAL(CP(HDQ_SIO),            (IDIS | PTU | EN  | M4)) /*GPIO_170*/\
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
+       MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+       MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+       MUX_VAL(CP(DSS_DATA0),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA1),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA2),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA3),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA4),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA5),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA18),         (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\
+       MUX_VAL(CP(DSS_DATA19),         (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\
+       MUX_VAL(CP(DSS_DATA20),         (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\
+       MUX_VAL(CP(DSS_DATA21),         (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\
+       MUX_VAL(CP(DSS_DATA22),         (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\
+       MUX_VAL(CP(DSS_DATA23),         (IDIS | PTD | DIS | M3)) /*DSS_DATA5*/\
+       MUX_VAL(CP(SYS_BOOT0),          (IDIS | PTD | DIS | M3)) /*DSS_DATA18*/\
+       MUX_VAL(CP(SYS_BOOT1),          (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\
+       MUX_VAL(CP(SYS_BOOT3),          (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\
+       MUX_VAL(CP(SYS_BOOT4),          (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\
+       MUX_VAL(CP(SYS_BOOT5),          (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
+       MUX_VAL(CP(SYS_BOOT6),          (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/
+
 #endif