Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[oweals/u-boot.git] / board / ti / beagle / beagle.h

diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 04247cdd1c67c49818194bce479aa69c7de1eb57..6dd2ffe558bf63f8d49bb99ebca7bfd04cc391ee 100644 (file)
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -2,27 +2,13 @@
  * (C) Copyright 2008
  * Dirk Behme <dirk.behme@gmail.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 #ifndef _BEAGLE_H_
 #define _BEAGLE_H_
 
+#include <asm/arch/dss.h>
+
 const omap3_sysinfo sysinfo = {
        DDR_STACKED,
        "OMAP3 Beagle board",
@@ -37,8 +23,7 @@ const omap3_sysinfo sysinfo = {
 #define REVISION_AXBX  0x7
 #define REVISION_CX    0x6
 #define REVISION_C4    0x5
-#define REVISION_XM_A  0x0
-#define REVISION_XM_B  0x1
+#define REVISION_XM_AB 0x0
 #define REVISION_XM_C  0x2
 
 /*
@@ -472,4 +457,90 @@ const omap3_sysinfo sysinfo = {
        MUX_VAL(CP(MMC2_DAT6),      (IDIS | PTU | EN  | M4)) /*GPIO_138 BT_EN*/\
        MUX_VAL(CP(MMC2_DAT7),      (IDIS | PTU | EN  | M4)) /*GPIO_139 WLAN_EN*/
 
+/*
+ * Display Configuration
+ */
+
+#define DVI_BEAGLE_ORANGE_COL          0x00FF8000
+#define VENC_HEIGHT                    0x00ef
+#define VENC_WIDTH                     0x027f
+
+/*
+ * Configure VENC in DSS for Beagle to generate Color Bar
+ *
+ * Kindly refer to OMAP TRM for definition of these values.
+ */
+static const struct venc_regs venc_config_std_tv = {
+       .status                                 = 0x0000001B,
+       .f_control                              = 0x00000040,
+       .vidout_ctrl                            = 0x00000000,
+       .sync_ctrl                              = 0x00008000,
+       .llen                                   = 0x00008359,
+       .flens                                  = 0x0000020C,
+       .hfltr_ctrl                             = 0x00000000,
+       .cc_carr_wss_carr                       = 0x043F2631,
+       .c_phase                                = 0x00000024,
+       .gain_u                                 = 0x00000130,
+       .gain_v                                 = 0x00000198,
+       .gain_y                                 = 0x000001C0,
+       .black_level                            = 0x0000006A,
+       .blank_level                            = 0x0000005C,
+       .x_color                                = 0x00000000,
+       .m_control                              = 0x00000001,
+       .bstamp_wss_data                        = 0x0000003F,
+       .s_carr                                 = 0x21F07C1F,
+       .line21                                 = 0x00000000,
+       .ln_sel                                 = 0x00000015,
+       .l21__wc_ctl                            = 0x00001400,
+       .htrigger_vtrigger                      = 0x00000000,
+       .savid__eavid                           = 0x069300F4,
+       .flen__fal                              = 0x0016020C,
+       .lal__phase_reset                       = 0x00060107,
+       .hs_int_start_stop_x                    = 0x008D034E,
+       .hs_ext_start_stop_x                    = 0x000F0359,
+       .vs_int_start_x                         = 0x01A00000,
+       .vs_int_stop_x__vs_int_start_y          = 0x020501A0,
+       .vs_int_stop_y__vs_ext_start_x          = 0x01AC0024,
+       .vs_ext_stop_x__vs_ext_start_y          = 0x020D01AC,
+       .vs_ext_stop_y                          = 0x00000006,
+       .avid_start_stop_x                      = 0x03480079,
+       .avid_start_stop_y                      = 0x02040024,
+       .fid_int_start_x__fid_int_start_y       = 0x0001008A,
+       .fid_int_offset_y__fid_ext_start_x      = 0x01AC0106,
+       .fid_ext_start_y__fid_ext_offset_y      = 0x01060006,
+       .tvdetgp_int_start_stop_x               = 0x00140001,
+       .tvdetgp_int_start_stop_y               = 0x00010001,
+       .gen_ctrl                               = 0x00FF0000,
+       .output_control                         = 0x0000000D,
+       .dac_b__dac_c                           = 0x00000000
+};
+
+/*
+ * Configure Timings for DVI D
+ */
+static const struct panel_config dvid_cfg = {
+       .timing_h       = 0x0ff03f31, /* Horizontal timing */
+       .timing_v       = 0x01400504, /* Vertical timing */
+       .pol_freq       = 0x00007028, /* Pol Freq */
+       .divisor        = 0x00010006, /* 72Mhz Pixel Clock */
+       .lcd_size       = 0x02ff03ff, /* 1024x768 */
+       .panel_type     = 0x01, /* TFT */
+       .data_lines     = 0x03, /* 24 Bit RGB */
+       .load_mode      = 0x02, /* Frame Mode */
+       .panel_color    = DVI_BEAGLE_ORANGE_COL, /* ORANGE */
+       .gfx_format     = GFXFORMAT_RGB24_UNPACKED,
+};
+
+static const struct panel_config dvid_cfg_xm = {
+       .timing_h       = 0x1a4024c9, /* Horizontal timing */
+       .timing_v       = 0x02c00509, /* Vertical timing */
+       .pol_freq       = 0x00007028, /* Pol Freq */
+       .divisor        = 0x00010001, /* 96MHz Pixel Clock */
+       .lcd_size       = 0x02ff03ff, /* 1024x768 */
+       .panel_type     = 0x01, /* TFT */
+       .data_lines     = 0x03, /* 24 Bit RGB */
+       .load_mode      = 0x02, /* Frame Mode */
+       .panel_color    = DVI_BEAGLE_ORANGE_COL, /* ORANGE */
+       .gfx_format     = GFXFORMAT_RGB24_UNPACKED,
+};
 #endif