Merge git://git.denx.de/u-boot-samsung

[oweals/u-boot.git] / board / teejet / mt_ventoux / mt_ventoux.c

diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index ecb9b6c41368ad6c3fdec89df9e2d45749b61906..6b05541964ccf5d2a4fb226221823199f056c048 100644 (file)
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -4,19 +4,7 @@
  *
  * Copyright (C) 2009 TechNexion Ltd.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -31,7 +19,7 @@
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/dss.h>
-#include <asm/arch/clocks.h>
+#include <asm/arch/clock.h>
 #include <i2c.h>
 #include <spartan3.h>
 #include <asm/gpio.h>
@@ -45,6 +33,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define BUZZER         140
 #define SPEAKER                141
+#define USB1_PWR       127
+#define USB2_PWR       149
 
 #ifndef CONFIG_FPGA
 #error "The Teejet mt_ventoux must have CONFIG_FPGA enabled"
@@ -71,14 +61,15 @@ static struct {
 
 static struct panel_config lcd_cfg[] = {
        {
-       .timing_h       = PANEL_TIMING_H(4, 8, 41),
-       .timing_v       = PANEL_TIMING_V(2, 4, 10),
-       .pol_freq       = 0x00000000, /* Pol Freq */
-       .divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+       .timing_h       = PANEL_TIMING_H(40, 5, 2),
+       .timing_v       = PANEL_TIMING_V(8, 8, 2),
+       .pol_freq       = 0x00003000, /* Pol Freq */
+       .divisor        = 0x00010033, /* 9 Mhz Pixel Clock */
        .panel_type     = 0x01, /* TFT */
        .data_lines     = 0x03, /* 24 Bit RGB */
        .load_mode      = 0x02, /* Frame Mode */
        .panel_color    = 0,
+       .gfx_format     = GFXFORMAT_RGB24_UNPACKED,
        },
        {
        .timing_h       = PANEL_TIMING_H(20, 192, 4),
@@ -89,6 +80,7 @@ static struct panel_config lcd_cfg[] = {
        .data_lines     = 0x03, /* 24 Bit RGB */
        .load_mode      = 0x02, /* Frame Mode */
        .panel_color    = 0,
+       .gfx_format     = GFXFORMAT_RGB24_UNPACKED,
        }
 };
 #endif
@@ -110,9 +102,10 @@ static struct omap_usbhs_board_data usbhs_bdata = {
        .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
 };
 
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+               struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
-       return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+       return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
 }
 
 int ehci_hcd_stop(int index)
@@ -175,9 +168,9 @@ int fpga_post_config_fn(int cookie)
 {
        debug("%s:%d: FPGA post-configuration\n", __func__, __LINE__);
 
-       fpga_reset(TRUE);
+       fpga_reset(true);
        udelay(100);
-       fpga_reset(FALSE);
+       fpga_reset(false);
 
        return 0;
 }
@@ -197,7 +190,7 @@ int fpga_clk_fn(int assert_clk, int flush, int cookie)
        return assert_clk;
 }
 
-Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = {
+xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = {
        fpga_pre_config_fn,
        fpga_pgm_fn,
        fpga_clk_fn,
@@ -207,7 +200,7 @@ Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = {
        fpga_post_config_fn,
 };
 
-Xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial,
+xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial,
                        (void *)&mt_ventoux_fpga_fns, 0);
 
 /* Initialize the FPGA */
@@ -247,24 +240,35 @@ int board_init(void)
        gpio_direction_output(BUZZER, 0);
        gpio_direction_output(SPEAKER, 0);
 
+       /* Activate USB power */
+       gpio_request(USB1_PWR, "USB1_PWR");
+       gpio_request(USB2_PWR, "USB2_PWR");
+       gpio_direction_output(USB1_PWR, 1);
+       gpio_direction_output(USB2_PWR, 1);
+
        return 0;
 }
 
+#ifndef CONFIG_SPL_BUILD
 int misc_init_r(void)
 {
        char *eth_addr;
+       struct tam3517_module_info info;
+       int ret;
 
-       dieid_num_r();
+       TAM3517_READ_EEPROM(&info, ret);
+       omap_die_id_display();
 
-       eth_addr = getenv("ethaddr");
-       if (eth_addr)
+       if (ret)
                return 0;
+       eth_addr = getenv("ethaddr");
+       if (!eth_addr)
+               TAM3517_READ_MAC_FROM_EEPROM(&info);
 
-#ifndef CONFIG_SPL_BUILD
-       TAM3517_READ_MAC_FROM_EEPROM;
-#endif
+       TAM3517_PRINT_SOM_INFO(&info);
        return 0;
 }
+#endif
 
 /*
  * Routine: set_muxconf_regs
@@ -287,11 +291,11 @@ int board_eth_init(bd_t *bis)
        return 0;
 }
 
-#if defined(CONFIG_OMAP_HSMMC) && \
+#if defined(CONFIG_MMC_OMAP_HS) && \
        !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
-       return omap_mmc_init(0, 0, 0);
+       return omap_mmc_init(0, 0, 0, -1, -1);
 }
 #endif