writel(input_select1, &inputselect->i2c3_ipp_sda_in); /* I2C3 SDA */
writel(input_select2, &inputselect->i2c3_ipp_scl_in); /* I2C3 SCL */
- /* board id for linux */
- gd->bd->bi_arch_number = MACH_TYPE_ZMX25;
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
#ifdef CONFIG_FEC_MXC
struct iomuxc_mux_ctl *muxctl;
- struct iomuxc_pad_ctl *padctl;
u32 gpio_mux_mode2 = MX25_PIN_MUX_MODE(2);
u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5);
* FEC_RX_ERR: FEC_RX_ERR is ALT 2 mode of pin R2
*/
muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
- padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
writel(gpio_mux_mode5, &muxctl->pad_upll_bypclk);
writel(gpio_mux_mode2, &muxctl->pad_uart2_cts);
PHYS_SDRAM_SIZE);
return 0;
}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = gd->ram_size;
-}