Merge tag 'rpi-next-2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspb...

[oweals/u-boot.git] / board / synopsys / emsdp / emsdp.c

diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index c0770b58c1f51d24a698502fa5bac6e48946238c..c09ed8cff826d616febb252bc2cde7b6fd06c81d 100644 (file)
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <dwmmc.h>
 #include <malloc.h>
 
@@ -48,33 +49,41 @@ int mach_cpu_init(void)
        return 0;
 }
 
-int board_mmc_init(bd_t *bis)
+int board_early_init_r(void)
 {
-       struct dwmci_host *host = NULL;
+#define EMSDP_PSRAM_BASE               0xf2001000
+#define PSRAM_FLASH_CONFIG_REG_0       (void *)(EMSDP_PSRAM_BASE + 0x10)
+#define PSRAM_FLASH_CONFIG_REG_1       (void *)(EMSDP_PSRAM_BASE + 0x14)
+#define CRE_ENABLE                     BIT(31)
+#define CRE_DRIVE_CMD                  BIT(6)
 
-       host = malloc(sizeof(struct dwmci_host));
-       if (!host) {
-               printf("dwmci_host malloc fail!\n");
-               return 1;
-       }
+#define PSRAM_RCR_DPD                  BIT(1)
+#define PSRAM_RCR_PAGE_MODE            BIT(7)
 
-       memset(host, 0, sizeof(struct dwmci_host));
-       host->name = "Synopsys Mobile storage";
-       host->ioaddr = SDIO_BASE;
-       host->buswidth = 4;
-       host->dev_index = 0;
-       host->bus_hz = 50000000;
+/*
+ * PSRAM_FLASH_CONFIG_REG_x[30:15] to the address lines[16:1] of flash,
+ * thus "<< 1".
+ */
+#define PSRAM_RCR_SETUP                ((PSRAM_RCR_DPD | PSRAM_RCR_PAGE_MODE) << 1)
 
-       add_dwmci(host, host->bus_hz / 2, 400000);
+       // Switch PSRAM controller to command mode
+       writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_0);
+       // Program Refresh Configuration Register (RCR) for BANK0
+       writew(0, (void *)(0x10000000 + PSRAM_RCR_SETUP));
+       // Switch PSRAM controller back to memory mode
+       writel(0, PSRAM_FLASH_CONFIG_REG_0);
 
-       return 0;
-}
 
-int board_mmc_getcd(struct mmc *mmc)
-{
-       struct dwmci_host *host = mmc->priv;
+       // Switch PSRAM controller to command mode
+       writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_1);
+       // Program Refresh Configuration Register (RCR) for BANK1
+       writew(0, (void *)(0x10800000 + PSRAM_RCR_SETUP));
+       // Switch PSRAM controller back to memory mode
+       writel(0, PSRAM_FLASH_CONFIG_REG_1);
+
+       printf("PSRAM initialized.\n");
 
-       return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
+       return 0;
 }
 
 #define CREG_BASE              0xF0001000