ARM: DT: stm32f7: add ethernet pin contol node

[oweals/u-boot.git] / board / st / stm32f746-disco / stm32f746-disco.c

diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 7ed7bf7263a1fc1616336fc7297a4d5ea5c9e6b1..8343f82ab55140126065a968de30c7419f375b1c 100644 (file)
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -27,14 +27,6 @@ const struct stm32_gpio_ctl gpio_ctl_gpout = {
        .af = STM32_GPIO_AF0
 };
 
-const struct stm32_gpio_ctl gpio_ctl_usart = {
-       .mode = STM32_GPIO_MODE_AF,
-       .otype = STM32_GPIO_OTYPE_PP,
-       .speed = STM32_GPIO_SPEED_50M,
-       .pupd = STM32_GPIO_PUPD_UP,
-       .af = STM32_GPIO_AF7
-};
-
 const struct stm32_gpio_ctl gpio_ctl_fmc = {
        .mode = STM32_GPIO_MODE_AF,
        .otype = STM32_GPIO_OTYPE_PP,
@@ -245,81 +237,24 @@ int dram_init(void)
        return rv;
 }
 
-static const struct stm32_gpio_dsc usart_gpio[] = {
-       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_9},  /* TX */
-       {STM32_GPIO_PORT_B, STM32_GPIO_PIN_7},  /* RX */
-};
-
 int uart_setup_gpio(void)
 {
-       int i;
-       int rv = 0;
-
        clock_setup(GPIO_A_CLOCK_CFG);
        clock_setup(GPIO_B_CLOCK_CFG);
-       for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
-               rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
-               if (rv)
-                       goto out;
-       }
-
-out:
-       return rv;
+       return 0;
 }
 
-static const struct stm32x7_serial_platdata serial_platdata = {
-       .base = (struct stm32_usart *)USART1_BASE,
-       .clock = CONFIG_SYS_CLK_FREQ,
-};
-
-U_BOOT_DEVICE(stm32x7_serials) = {
-       .name = "serial_stm32x7",
-       .platdata = &serial_platdata,
-};
-
 #ifdef CONFIG_ETH_DESIGNWARE
-const struct stm32_gpio_ctl gpio_ctl_eth = {
-       .mode = STM32_GPIO_MODE_AF,
-       .otype = STM32_GPIO_OTYPE_PP,
-       .speed = STM32_GPIO_SPEED_100M,
-       .pupd = STM32_GPIO_PUPD_NO,
-       .af = STM32_GPIO_AF11
-};
-
-static const struct stm32_gpio_dsc eth_gpio[] = {
-       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_1},  /* ETH_RMII_REF_CLK */
-       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_2},  /* ETH_MDIO */
-       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_7},  /* ETH_RMII_CRS_DV */
-
-       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_1},  /* ETH_MDC */
-       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_4},  /* ETH_RMII_RXD0 */
-       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_5},  /* ETH_RMII_RXD1 */
-
-       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_11}, /* ETH_RMII_TX_EN */
-       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_13}, /* ETH_RMII_TXD0 */
-       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_14}, /* ETH_RMII_TXD1 */
-};
 
 static int stmmac_setup(void)
 {
-       int res = 0;
-       int i;
-
        clock_setup(SYSCFG_CLOCK_CFG);
-
        /* Set >RMII mode */
        STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
 
        clock_setup(GPIO_A_CLOCK_CFG);
        clock_setup(GPIO_C_CLOCK_CFG);
        clock_setup(GPIO_G_CLOCK_CFG);
-
-       for (i = 0; i < ARRAY_SIZE(eth_gpio); i++) {
-               res = stm32_gpio_config(&eth_gpio[i], &gpio_ctl_eth);
-               if (res)
-                       return res;
-       }
-
        clock_setup(STMMAC_CLOCK_CFG);
 
        return 0;
@@ -390,7 +325,6 @@ int board_early_init_f(void)
        int res;
 
        res = uart_setup_gpio();
-       clock_setup(USART1_CLOCK_CFG);
        if (res)
                return res;