Merge git://git.denx.de/u-boot-fsl-qoriq
[oweals/u-boot.git] / board / solidrun / mx6cuboxi / mx6cuboxi.c
index d15c726a01e9b31a97c962084da20dd27f9c832e..ee9e4f7c01ebf0a1088c1bb0a32e109a84596fa9 100644 (file)
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/mxc_hdmi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/imx-common/video.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/sata.h>
+#include <asm/mach-imx/video.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <malloc.h>
@@ -33,7 +34,7 @@
 #include <asm/arch/sys_proto.h>
 #include <spl.h>
 #include <usb.h>
-#include <usb/ehci-fsl.h>
+#include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -143,8 +144,9 @@ static void setup_iomux_enet(void)
        SETUP_IOMUX_PADS(enet_pads);
 
        gpio_direction_output(ETH_PHY_RESET, 0);
-       mdelay(2);
+       mdelay(10);
        gpio_set_value(ETH_PHY_RESET, 1);
+       udelay(100);
 }
 
 int board_phy_config(struct phy_device *phydev)
@@ -164,7 +166,7 @@ int board_eth_init(bd_t *bis)
        struct mii_dev *bus;
        struct phy_device *phydev;
 
-       int ret = enable_fec_anatop_clock(ENET_25MHZ);
+       int ret = enable_fec_anatop_clock(0, ENET_25MHZ);
        if (ret)
                return ret;
 
@@ -306,25 +308,30 @@ int board_ehci_hcd_init(int port)
 
 int board_early_init_f(void)
 {
-       int ret = 0;
        setup_iomux_uart();
 
-#ifdef CONFIG_VIDEO_IPUV3
-       ret = setup_display();
+#ifdef CONFIG_CMD_SATA
+       setup_sata();
 #endif
 
 #ifdef CONFIG_USB_EHCI_MX6
        setup_usb();
 #endif
-       return ret;
+       return 0;
 }
 
 int board_init(void)
 {
+       int ret = 0;
+
        /* address of boot parameters */
        gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-       return 0;
+#ifdef CONFIG_VIDEO_IPUV3
+       ret = setup_display();
+#endif
+
+       return ret;
 }
 
 static bool is_hummingboard(void)
@@ -343,6 +350,7 @@ static bool is_hummingboard(void)
         * Machine selection -
         * Machine        val1, val2
         * -------------------------
+        * HB2            x     x
         * HB rev 3.x     x     0
         * CBi            0     1
         * HB             1     1
@@ -356,9 +364,37 @@ static bool is_hummingboard(void)
                return true;
 }
 
+static bool is_hummingboard2(void)
+{
+       int val1;
+
+       SETUP_IOMUX_PADS(hb_cbi_sense);
+
+       gpio_direction_input(IMX_GPIO_NR(2, 8));
+
+        val1 = gpio_get_value(IMX_GPIO_NR(2, 8));
+
+       /*
+        * Machine selection -
+        * Machine        val1
+        * -------------------
+        * HB2            0
+        * HB rev 3.x     x
+        * CBi            x
+        * HB             x
+        */
+
+       if (val1 == 0)
+               return true;
+       else
+               return false;
+}
+
 int checkboard(void)
 {
-       if (is_hummingboard())
+       if (is_hummingboard2())
+               puts("Board: MX6 Hummingboard2\n");
+       else if (is_hummingboard())
                puts("Board: MX6 Hummingboard\n");
        else
                puts("Board: MX6 Cubox-i\n");
@@ -366,26 +402,20 @@ int checkboard(void)
        return 0;
 }
 
-static bool is_mx6q(void)
-{
-       if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
-               return true;
-       else
-               return false;
-}
-
 int board_late_init(void)
 {
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-       if (is_hummingboard())
-               setenv("board_name", "HUMMINGBOARD");
+       if (is_hummingboard2())
+               env_set("board_name", "HUMMINGBOARD2");
+       else if (is_hummingboard())
+               env_set("board_name", "HUMMINGBOARD");
        else
-               setenv("board_name", "CUBOXI");
+               env_set("board_name", "CUBOXI");
 
-       if (is_mx6q())
-               setenv("board_rev", "MX6Q");
+       if (is_mx6dq())
+               env_set("board_rev", "MX6Q");
        else
-               setenv("board_rev", "MX6DL");
+               env_set("board_rev", "MX6DL");
 #endif
 
        return 0;
@@ -536,7 +566,7 @@ static const struct mx6_mmdc_calibration mx6dl_1g_mmcd_calib = {
        .p0_mpdgctrl0 =    0x023C0224,
        .p0_mpdgctrl1 =    0x02000220,
        .p1_mpdgctrl0 =    0x02200220,
-       .p1_mpdgctrl1 =    0x02000220,
+       .p1_mpdgctrl1 =    0x02040208,
        .p0_mprddlctl =    0x44444846,
        .p1_mprddlctl =    0x4042463C,
        .p0_mpwrdlctl =    0x32343032,
@@ -583,21 +613,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
-/*
- * This section requires the differentiation between Solidrun mx6 boards, but
- * for now, it will configure only for the mx6dual hummingboard version.
- */
 static void spl_dram_init(int width)
 {
        struct mx6_ddr_sysinfo sysinfo = {
@@ -615,9 +630,12 @@ static void spl_dram_init(int width)
                .bi_on = 1,     /* Bank interleaving enabled */
                .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
                .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
+               .ddr_type = DDR_TYPE_DDR3,
+               .refsel = 1,    /* Refresh cycles at 32KHz */
+               .refr = 7,      /* 8 refresh commands per refresh cycle */
        };
 
-       if (is_cpu_type(MXC_CPU_MX6D) || is_cpu_type(MXC_CPU_MX6Q))
+       if (is_mx6dq())
                mx6dq_dram_iocfg(width, &mx6q_ddr_ioregs, &mx6q_grp_ioregs);
        else
                mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);
@@ -627,7 +645,7 @@ static void spl_dram_init(int width)
        else if (is_cpu_type(MXC_CPU_MX6Q))
                mx6_dram_cfg(&sysinfo, &mx6q_2g_mmcd_calib, &mem_ddr_4g);
        else if (is_cpu_type(MXC_CPU_MX6DL))
-               mx6_dram_cfg(&sysinfo, &mx6q_1g_mmcd_calib, &mem_ddr_2g);
+               mx6_dram_cfg(&sysinfo, &mx6dl_1g_mmcd_calib, &mem_ddr_2g);
        else if (is_cpu_type(MXC_CPU_MX6SOLO))
                mx6_dram_cfg(&sysinfo, &mx6dl_512m_mmcd_calib, &mem_ddr_2g);
 }