ppc4xx: Update Kilauea CPLD configuration with USB PHY reset bit

[oweals/u-boot.git] / board / sc520_cdp / sc520_cdp.c

diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
index 0fc836c629c7a2ea9c0579e9cc2d2787400721ed..f6f0e7244377e282ddcfdccce3f8cd7785f87185 100644 (file)
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -28,7 +28,9 @@
 #include <asm/pci.h>
 #include <asm/ic/sc520.h>
 #include <asm/ic/ali512x.h>
-#include <ssi.h>
+#include <spi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 #undef SC520_CDP_DEBUG
 
@@ -481,8 +483,6 @@ int pci_enable_legacy_video_ports(struct pci_controller *hose)
 
 int board_init(void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        init_sc520();
        bus_init();
        irq_init();
@@ -507,6 +507,7 @@ int dram_init(void)
 
 void show_boot_progress(int val)
 {
+       if (val < -32) val = -1;  /* let things compatible */
        outb(val&0xff, 0x80);
        outb((val&0xff00)>>8, 0x680);
 }
@@ -557,6 +558,19 @@ void ssi_chip_select(int dev)
        }
 }
 
+void spi_eeprom_probe(int x)
+{
+}
+
+int spi_eeprom_read(int x, int offset, char *buffer, int len)
+{
+       return 0;
+}
+
+int spi_eeprom_write(int x, int offset, char *buffer, int len)
+{
+       return 0;
+}
 
 void spi_init_f(void)
 {
@@ -585,6 +599,9 @@ ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
 #endif
 #ifdef CONFIG_SC520_CDP_USE_MW
        res = mw_eeprom_read(2, offset, buffer, len);
+#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+       res = 0;
 #endif
        return res;
 }
@@ -606,6 +623,9 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
 #endif
 #ifdef CONFIG_SC520_CDP_USE_MW
        res = mw_eeprom_write(2, offset, buffer, len);
+#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+       res = 0;
 #endif
        return res;
 }