Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
[oweals/u-boot.git] / board / sbc8548 / sbc8548.c
index 5e3e17658d2a3d2c787c2115276f7e6ed856bf15..d62cfd1befad01c65b0076016db5d6195159802d 100644 (file)
@@ -116,7 +116,7 @@ void
 local_bus_init(void)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 
        uint clkdiv;
        uint lbc_hz;
@@ -152,7 +152,7 @@ sdram_init(void)
 #if defined(CONFIG_SYS_LBC_SDRAM_SIZE)
 
        uint idx;
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
        uint lsdmr_common;
 
@@ -163,22 +163,14 @@ sdram_init(void)
        /*
         * Setup SDRAM Base and Option Registers
         */
-       out_be32(&lbc->or3, CONFIG_SYS_OR3_PRELIM);
-       asm("msync");
-
-       out_be32(&lbc->br3, CONFIG_SYS_BR3_PRELIM);
-       asm("msync");
-
-       out_be32(&lbc->or4, CONFIG_SYS_OR4_PRELIM);
-       asm("msync");
-
-       out_be32(&lbc->br4, CONFIG_SYS_BR4_PRELIM);
-       asm("msync");
+       set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
+       set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
+       set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
+       set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
 
        out_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
        asm("msync");
 
-
        out_be32(&lbc->lsrt,  CONFIG_SYS_LBC_LSRT);
        out_be32(&lbc->mrtpr, CONFIG_SYS_LBC_MRTPR);
        asm("msync");
@@ -359,7 +351,7 @@ pci_init_board(void)
 
                SET_STD_PCI_INFO(pci_info[num], 1);
                first_free_busno = fsl_pci_init_port(&pci_info[num++],
-                                       &pci1_hose, first_free_busno, 0);
+                                       &pci1_hose, first_free_busno);
        } else {
                printf ("    PCI: disabled\n");
        }
@@ -378,7 +370,7 @@ pci_init_board(void)
                SET_STD_PCIE_INFO(pci_info[num], 1);
                printf ("    PCIE at base address %lx\n", pci_info[num].regs);
                first_free_busno = fsl_pci_init_port(&pci_info[num++],
-                                       &pcie1_hose, first_free_busno, 0);
+                                       &pcie1_hose, first_free_busno);
        } else {
                printf ("    PCIE: disabled\n");
        }