*/
#undef WITH_AUTOSELECT
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#if 1
#define D(x)
unsigned long long *f_addr = (unsigned long long *)PHYS_FLASH;
unsigned long long f_command, vendor, device;
/* Perform Autoselect */
- f_command = 0x00AA00AA00AA00AAULL;
+ f_command = 0x00AA00AA00AA00AAULL;
ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
+ f_command = 0x0055005500550055ULL;
ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x0090009000900090ULL;
+ f_command = 0x0090009000900090ULL;
ull_write(&f_addr[0x555], &f_command);
ull_read(&f_addr[0], &vendor);
vendor &= 0xffff;
ull_read(&f_addr[1], &device);
device &= 0xffff;
- f_command = 0x00F000F000F000F0ULL;
+ f_command = 0x00F000F000F000F0ULL;
ull_write(&f_addr[0x555], &f_command);
if (vendor != VENDOR_AMD || device != AMD_29DL323C_B)
return 0;
#endif
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
* protect monitor and environment sectors
*/
-#if CFG_MONITOR_BASE >= PHYS_FLASH
+#if CONFIG_SYS_MONITOR_BASE >= PHYS_FLASH
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[1]);
#endif
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+# ifndef CONFIG_ENV_SIZE
+# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
# endif
flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
&flash_info[1]);
#endif
printf ("\n");
}
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00AA00AA00AA00AAULL;
+ f_addr = (unsigned long long *)info->start[0];
+ f_command = 0x00AA00AA00AA00AAULL;
ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
+ f_command = 0x0055005500550055ULL;
ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x0080008000800080ULL;
+ f_command = 0x0080008000800080ULL;
ull_write(&f_addr[0x555], &f_command);
- f_command = 0x00AA00AA00AA00AAULL;
+ f_command = 0x00AA00AA00AA00AAULL;
ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
+ f_command = 0x0055005500550055ULL;
ull_write(&f_addr[0x2AA], &f_command);
/* Disable interrupts which might cause a timeout here */
for (l_sect = -1, sect = s_first; sect<=s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
- f_addr =
+ f_addr =
(unsigned long long *)(info->start[sect]);
- f_command = 0x0030003000300030ULL;
+ f_command = 0x0030003000300030ULL;
ull_write(f_addr, &f_command);
l_sect = sect;
}
start = get_timer (0);
do
{
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT)
+ if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
{ /* write reset command, command address is unimportant */
/* this command turns the flash back to read mode */
f_addr =
(unsigned long long *)(info->start[l_sect]);
- f_command = 0x00F000F000F000F0ULL;
+ f_command = 0x00F000F000F000F0ULL;
ull_write(f_addr, &f_command);
printf (" timeout\n");
return 1;
*
* PARAMETERS: 32 bit long pointer to address, 64 bit long pointer to data
*
-* RETURNS: 0 if OK, 1 if timeout, 4 if parameter error
+* RETURNS: 0 if OK, 1 if timeout, 4 if parameter error
*--------------------------------------------------------------------------*/
static unsigned char write_ull(flash_info_t *info,
if (address & 0x7)
return ERR_ALIGN;
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00AA00AA00AA00AAULL;
+ f_addr = (unsigned long long *)info->start[0];
+ f_command = 0x00AA00AA00AA00AAULL;
ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
+ f_command = 0x0055005500550055ULL;
ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x00A000A000A000A0ULL;
+ f_command = 0x00A000A000A000A0ULL;
ull_write(&f_addr[0x555], &f_command);
- f_addr = (unsigned long long *)address;
- f_command = data;
+ f_addr = (unsigned long long *)address;
+ f_command = data;
ull_write(f_addr, &f_command);
start = get_timer (0);
do
{
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
{
/* write reset command, command address is unimportant */
/* this command turns the flash back to read mode */
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00F000F000F000F0ULL;
+ f_addr = (unsigned long long *)info->start[0];
+ f_command = 0x00F000F000F000F0ULL;
ull_write(f_addr, &f_command);
return ERR_TIMOUT;
}