DECLARE_GLOBAL_DATA_PTR;
+#define CPGWPR 0xE6150900
#define CPGWPCR 0xE6150904
-#define CPGWPR 0xE615090C
/* PLL */
#define PLL0CR 0xE61500D8
int board_early_init_f(void)
{
- writel(0xA5A5FFFF, CPGWPCR);
- writel(0x5A5A0000, CPGWPR);
+ /* Unlock CPG access */
+ writel(0xA5A5FFFF, CPGWPR);
+ writel(0x5A5A0000, CPGWPCR);
/* TMU0 */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;