p1014rdb: set ddr bus width properly depending on SVR

[oweals/u-boot.git] / board / qemu-mips / qemu-mips.c

diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
index 68690743d686434c7702819aa0bb43a62a04f5b5..2b3a1d6b0992f79157246655f3bfed5daff4a6fd 100644 (file)
--- a/board/qemu-mips/qemu-mips.c
+++ b/board/qemu-mips/qemu-mips.c
@@ -25,8 +25,9 @@
 #include <command.h>
 #include <asm/mipsregs.h>
 #include <asm/io.h>
+#include <netdev.h>
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        /* Sdram is setup by assembler code */
        /* If memory could be changed, we should return the true value here */
@@ -38,7 +39,7 @@ int checkboard(void)
        u32 proc_id;
        u32 config1;
 
-       proc_id = read_32bit_cp0_register(CP0_PRID);
+       proc_id = read_c0_prid();
        printf("Board: Qemu -M mips CPU: ");
        switch (proc_id) {
        case 0x00018000:
@@ -51,7 +52,7 @@ int checkboard(void)
                printf("4KEc");
                break;
        case 0x00019300:
-               config1 = read_mips32_cp0_config1();
+               config1 = read_c0_config1();
                if (config1 & 1)
                        printf("24Kf");
                else
@@ -64,7 +65,7 @@ int checkboard(void)
                printf("R4000");
                break;
        case 0x00018100:
-               config1 = read_mips32_cp0_config1();
+               config1 = read_c0_config1();
                if (config1 & 1)
                        printf("5Kf");
                else
@@ -87,3 +88,8 @@ int misc_init_r(void)
        set_io_port_base(0);
        return 0;
 }
+
+int board_eth_init(bd_t *bis)
+{
+       return ne2k_register();
+}