Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

[oweals/u-boot.git] / board / nvidia / common / board.c

diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index d1d8a29cbaa1ae689c98348e435a6a65a265d9cb..f60f21f39f1103517bdd5c70d7d63e53a5105ac1 100644 (file)
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -46,8 +46,13 @@
 #include <asm/arch/emc.h>
 #endif
 #ifdef CONFIG_USB_EHCI_TEGRA
+#include <asm/arch-tegra/usb.h>
 #include <asm/arch/usb.h>
 #endif
+#ifdef CONFIG_TEGRA_MMC
+#include <asm/arch-tegra/tegra_mmc.h>
+#include <asm/arch-tegra/mmc.h>
+#endif
 #include <i2c.h>
 #include <spi.h>
 #include "emc.h"
@@ -128,10 +133,7 @@ int board_init(void)
        clock_init();
        clock_verify();
 
-#ifdef CONFIG_SPI_UART_SWITCH
-       gpio_config_uart();
-#endif
-#if defined(CONFIG_TEGRA_SPI) || defined(CONFIG_TEGRA_SLINK)
+#ifdef CONFIG_FDT_SPI
        pin_mux_spi();
        spi_init();
 #endif
@@ -221,3 +223,53 @@ int board_late_init(void)
 #endif
        return 0;
 }
+
+#if defined(CONFIG_TEGRA_MMC)
+void __pin_mux_mmc(void)
+{
+}
+
+void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
+
+/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+       debug("%s called\n", __func__);
+
+       /* Enable muxes, etc. for SDMMC controllers */
+       pin_mux_mmc();
+
+       debug("%s: init MMC\n", __func__);
+       tegra_mmc_init();
+
+       return 0;
+}
+
+void pad_init_mmc(struct mmc_host *host)
+{
+#if defined(CONFIG_TEGRA30)
+       enum periph_id id = host->mmc_id;
+       u32 val;
+
+       debug("%s: sdmmc address = %08x, id = %d\n", __func__,
+               (unsigned int)host->reg, id);
+
+       /* Set the pad drive strength for SDMMC1 or 3 only */
+       if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
+               debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
+                       __func__);
+               return;
+       }
+
+       val = readl(&host->reg->sdmemcmppadctl);
+       val &= 0xFFFFFFF0;
+       val |= MEMCOMP_PADCTRL_VREF;
+       writel(val, &host->reg->sdmemcmppadctl);
+
+       val = readl(&host->reg->autocalcfg);
+       val &= 0xFFFF0000;
+       val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
+       writel(val, &host->reg->autocalcfg);
+#endif /* T30 */
+}
+#endif /* MMC */