ppc4xx: lwmon5: Change PHY reset sequence for PHY MDIO address latching

[oweals/u-boot.git] / board / nc650 / nand.c

diff --git a/board/nc650/nand.c b/board/nc650/nand.c
index f27e536e504ac161e15b83cc5d368594a9eb2945..8617f7445f300b0f0d179cfe3029a94abddb1afd 100644 (file)
--- a/board/nc650/nand.c
+++ b/board/nc650/nand.c
@@ -24,7 +24,7 @@
 #include <common.h>
 
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
 
 #include <nand.h>
 
@@ -37,22 +37,22 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
        struct nand_chip *this = mtd->priv;
 
        switch(cmd) {
-               case NAND_CTL_SETCLE:
-                       this->IO_ADDR_W += 2;
-                       break;
-               case NAND_CTL_CLRCLE:
-                       this->IO_ADDR_W -= 2;
-                       break;
-               case NAND_CTL_SETALE:
-                       this->IO_ADDR_W += 1;
-                       break;
-               case NAND_CTL_CLRALE:
-                       this->IO_ADDR_W -= 1;
-                       break;
-               case NAND_CTL_SETNCE:
-               case NAND_CTL_CLRNCE:
-                       /* nop */
-                       break;
+       case NAND_CTL_SETCLE:
+               this->IO_ADDR_W += 2;
+               break;
+       case NAND_CTL_CLRCLE:
+               this->IO_ADDR_W -= 2;
+               break;
+       case NAND_CTL_SETALE:
+               this->IO_ADDR_W += 1;
+               break;
+       case NAND_CTL_CLRALE:
+               this->IO_ADDR_W -= 1;
+               break;
+       case NAND_CTL_SETNCE:
+       case NAND_CTL_CLRNCE:
+               /* nop */
+               break;
        }
 }
 #elif defined(CONFIG_IDS852_REV2)
@@ -64,24 +64,24 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
        struct nand_chip *this = mtd->priv;
 
        switch(cmd) {
-               case NAND_CTL_SETCLE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
-                       break;
-               case NAND_CTL_CLRCLE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-                       break;
-               case NAND_CTL_SETALE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
-                       break;
-               case NAND_CTL_CLRALE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-                       break;
-               case NAND_CTL_SETNCE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-                       break;
-               case NAND_CTL_CLRNCE:
-                       *(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
-                       break;
+       case NAND_CTL_SETCLE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0;
+               break;
+       case NAND_CTL_CLRCLE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+               break;
+       case NAND_CTL_SETALE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0;
+               break;
+       case NAND_CTL_CLRALE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+               break;
+       case NAND_CTL_SETNCE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+               break;
+       case NAND_CTL_CLRNCE:
+               *(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0;
+               break;
        }
 }
 #else
@@ -106,12 +106,13 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
  * Members with a "?" were not set in the merged testing-NAND branch,
  * so they are not set here either.
  */
-void board_nand_init(struct nand_chip *nand)
+int board_nand_init(struct nand_chip *nand)
 {
 
        nand->hwcontrol = nc650_hwcontrol;
        nand->eccmode = NAND_ECC_SOFT;
        nand->chip_delay = 12;
 /*     nand->options = NAND_SAMSUNG_LP_OPTIONS;*/
+       return 0;
 }
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif