*/
#include <common.h>
+#include <asm/io.h>
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
/*
* hardware specific access to control-lines
*/
-static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
- switch(cmd) {
- case NAND_CTL_SETCLE:
- this->IO_ADDR_W += 2;
- break;
- case NAND_CTL_CLRCLE:
- this->IO_ADDR_W -= 2;
- break;
- case NAND_CTL_SETALE:
- this->IO_ADDR_W += 1;
- break;
- case NAND_CTL_CLRALE:
- this->IO_ADDR_W -= 1;
- break;
- case NAND_CTL_SETNCE:
- case NAND_CTL_CLRNCE:
- /* nop */
- break;
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if ( ctrl & NAND_CLE )
+ this->IO_ADDR_W += 2;
+ else
+ this->IO_ADDR_W -= 2;
+ if ( ctrl & NAND_ALE )
+ this->IO_ADDR_W += 1;
+ else
+ this->IO_ADDR_W -= 1;
}
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
}
#elif defined(CONFIG_IDS852_REV2)
/*
* hardware specific access to control-lines
*/
-static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
- switch(cmd) {
- case NAND_CTL_SETCLE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0;
- break;
- case NAND_CTL_CLRCLE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
- break;
- case NAND_CTL_SETALE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0;
- break;
- case NAND_CTL_CLRALE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
- break;
- case NAND_CTL_SETNCE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
- break;
- case NAND_CTL_CLRNCE:
- *(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0;
- break;
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if ( ctrl & NAND_CLE )
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W + 0xa);
+ else
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0x8);
+ if ( ctrl & NAND_ALE )
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0x9);
+ else
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0x8);
+ if ( ctrl & NAND_NCE )
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0x8);
+ else
+ writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0xc);
}
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
}
#else
#error Unknown IDS852 module revision
* argument are board-specific (per include/linux/mtd/nand.h):
* - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
* - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
- * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - cmd_ctrl: hardwarespecific function for accesing control-lines
* - dev_ready: hardwarespecific function for accesing device ready/busy line
* - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
* only be provided if a hardware ECC is available
- * - eccmode: mode of ecc, see defines
+ * - eccm.ode: mode of ecc, see defines
* - chip_delay: chip dependent delay for transfering data from array to
* read regs (tR)
* - options: various chip options. They can partly be set to inform
int board_nand_init(struct nand_chip *nand)
{
- nand->hwcontrol = nc650_hwcontrol;
- nand->eccmode = NAND_ECC_SOFT;
+ nand->cmd_ctrl = nc650_hwcontrol;
+ nand->ecc.mode = NAND_ECC_SOFT;
nand->chip_delay = 12;
/* nand->options = NAND_SAMSUNG_LP_OPTIONS;*/
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif