Merge branch 'master' of http://www.denx.de/git/u-boot

[oweals/u-boot.git] / board / mpc8560ads / mpc8560ads.c

diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c
index 1990e54769c15193f92981c322030d6f497e1d06..f9d75e80510aae6c63d6169a08cb014b54c5a788 100644 (file)
--- a/board/mpc8560ads/mpc8560ads.c
+++ b/board/mpc8560ads/mpc8560ads.c
@@ -33,7 +33,7 @@
 #include <spd.h>
 #include <miiphy.h>
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 
@@ -237,9 +237,14 @@ void reset_phy (void)
        udelay(1000);
 #endif
 #if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
-       miiphy_reset(0x0);      /* reset PHY */
-       miiphy_write(0, PHY_MIPSCR, 0xf028); /* change PHY address to 0x02 */
-       miiphy_write(0x02, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+       /* reset PHY */
+       miiphy_reset("FCC1 ETHERNET", 0x0);
+
+       /* change PHY address to 0x02 */
+       bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
+
+       bb_miiphy_write(NULL, 0x02, PHY_BMCR,
+                       PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
 #endif /* CONFIG_MII */
 }
 
@@ -293,7 +298,7 @@ initdram(int board_type)
        dram_size = fixed_sdram ();
 #endif
 
-#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
        /*
         * Initialize and enable DDR ECC.
         */
@@ -539,3 +544,12 @@ pci_init_board(void)
        pci_mpc85xx_init(&hose);
 #endif /* CONFIG_PCI */
 }
+
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+       ft_cpu_setup(blob, bd);
+}
+#endif