Setup extra MIMC200 chip selects

[oweals/u-boot.git] / board / mimc / mimc200 / mimc200.c

diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 1092cd036da7c41061ce1dc25b3d405ddba6b059..6df741e397625add6a906d88e21f09ea121154bd 100644 (file)
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -30,7 +30,7 @@
 #include <asm/arch/portmux.h>
 #include <lcd.h>
 
-#define SM_PM_GCCTRL                           0x0060
+#include "../../../cpu/at32ap/hsmc3.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -76,22 +76,30 @@ int board_early_init_f(void)
 
        /* are we suppressing the console ? */
        if (gpio_get_value(GPIO_PIN_PE(21)) == 1)
-               gd->flags |= GD_FLG_SILENT;
+               gd->flags |= (GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE);
 
        /* reset phys */
        portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT);
        portmux_select_gpio(PORTMUX_PORT_C, 1 << 18,
                        PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
 
-       /* GCLK0 - 10MHz clock */
-       writel(0x00000004, (void *)SM_BASE + SM_PM_GCCTRL);
-       portmux_select_peripheral(PORTMUX_PORT_A, 1 << 30, PORTMUX_FUNC_A, 0);
-
        udelay(5000);
 
        /* release phys reset */
        gpio_set_value(GPIO_PIN_PC(18), 0);     /* PHY RESET (Release)  */
 
+       /* setup Data Flash chip select (NCS2) */
+       hsmc3_writel(MODE2, 0x20121003);
+       hsmc3_writel(CYCLE2, 0x000a0009);
+       hsmc3_writel(PULSE2, 0x0a060806);
+       hsmc3_writel(SETUP2, 0x00030102);
+
+       /* setup FRAM chip select (NCS3) */
+       hsmc3_writel(MODE3, 0x10120001);
+       hsmc3_writel(CYCLE3, 0x001e001d);
+       hsmc3_writel(PULSE3, 0x08040704);
+       hsmc3_writel(SETUP3, 0x02050204);
+
 #if defined(CONFIG_MACB)
        /* init macb0 pins */
        portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
@@ -132,6 +140,14 @@ int board_early_init_r(void)
        return 0;
 }
 
+int board_postclk_init(void)
+{
+       /* Use GCLK0 as 10MHz output */
+       gclk_enable_output(0, PORTMUX_DRIVE_LOW);
+       gclk_set_rate(0, GCLK_PARENT_OSC0, 10000000);
+       return 0;
+}
+
 /* SPI chip select control */
 #ifdef CONFIG_ATMEL_SPI
 #include <spi.h>