extern flash_info_t flash_info[]; /* FLASH chips info */
+extern int do_auto_update(void);
ulong flash_get_size (ulong base, int banknum);
#ifndef CFG_RAMBOOT
/*
* ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
+ * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ * is something else than 0x00000000.
*/
long int initdram (int board_type)
*/
svr = get_svr();
pvr = get_pvr();
- if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) &&
- (PVR_MIN(pvr) == 4)) {
+ if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
__asm__ volatile ("sync");
}
flash_info[0].sector_count = snum;
}
+#ifdef CONFIG_AUTO_UPDATE
+ do_auto_update();
+#endif
return (0);
}
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
debug ("ide_reset(%d)\n", idereset);
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{