#include <mpc5xxx.h>
#include <pci.h>
-//###CHD: es gibt eigentlich kein DDR bei uns -> weg damit!; dto. PCI!
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-//#include "mt48lc16m16a2-75.h"
#include "mt48lc8m32b2-6-7.h"
-#endif
+
+DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[]; /* FLASH chips info */
-//###CHD: wenn RAMBOOT gehen wuerde, ....
+ulong flash_get_size (ulong base, int banknum);
+
#ifndef CFG_RAMBOOT
static void sdram_start (int hi_addr)
{
* is something else than 0x00000000.
*/
-#if defined(CONFIG_MPC5200)
long int initdram (int board_type)
{
ulong dramsize = 0;
return dramsize + dramsize2;
}
-//###CHD: sowas gibt es bei usn nicht!
-#elif defined(CONFIG_MGT5100)
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
int checkboard (void)
{
puts ("Board: MCC200\n");
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Adjust flash start and offset to detected values
*/
&flash_info[CFG_MAX_FLASH_BANKS - 1]);
}
+ if (gd->bd->bi_flashsize > (32 << 20)) {
+ /* Unprotect the upper bank of the Flash */
+ *(volatile int*)MPC5XXX_CS0_CFG |= (1 << 6);
+ flash_protect (FLAG_PROTECT_CLEAR,
+ flash_info[0].start[0] + flash_info[0].size / 2,
+ (flash_info[0].start[0] + flash_info[0].size) / 2 - 1,
+ &flash_info[0]);
+ *(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
+ }
+
return (0);
}