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arm: maxbcm: Enable SPL to include DDR training code into U-Boot
[oweals/u-boot.git]
/
board
/
maxbcm
/
kwbimage.cfg
diff --git
a/board/maxbcm/kwbimage.cfg
b/board/maxbcm/kwbimage.cfg
index 5a3bc67c1c8fae78a063cda5dba3786434063fb2..cc057925566c584d66b0dc73207f5a62523ad2f6 100644
(file)
--- a/
board/maxbcm/kwbimage.cfg
+++ b/
board/maxbcm/kwbimage.cfg
@@
-9,4
+9,4
@@
VERSION 1
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
-BINARY
board/maxbcm/binary.0
0000005b 00000068
+BINARY
spl/u-boot-spl.bin
0000005b 00000068