ARM: am3517_evm: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA

[oweals/u-boot.git] / board / logicpd / am3517evm / am3517evm.c

diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index c18a5a3140b9323ce01535deabc0899d4e95d5d8..da8be22085689f70296554ce0099654f30d4a6a8 100644 (file)
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * am3517evm.c - board file for TI's AM3517 family of devices.
  *
@@ -7,11 +8,11 @@
  *
  * Copyright (C) 2010
  * Texas Instruments Incorporated - http://www.ti.com/
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <asm/io.h>
 #include <asm/omap_musb.h>
 #include <asm/arch/am35x_def.h>
@@ -34,6 +35,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define AM3517_IP_SW_RESET     0x48002598
 #define CPGMACSS_SW_RST                (1 << 1)
+#define PHY_GPIO               30
+
 
 /*
  * Routine: board_init
@@ -113,30 +116,35 @@ int misc_init_r(void)
 
        am3517_evm_musb_init();
 
-       /* activate PHY reset */
-       gpio_direction_output(30, 0);
-       gpio_set_value(30, 0);
-
-       ctr  = 0;
-       do {
-               udelay(1000);
-               ctr++;
-       } while (ctr < 300);
-
-       /* deactivate PHY reset */
-       gpio_set_value(30, 1);
-
-       /* allow the PHY to stabilize and settle down */
-       ctr = 0;
-       do {
-               udelay(1000);
-               ctr++;
-       } while (ctr < 300);
-
-       /* ensure that the module is out of reset */
-       reset = readl(AM3517_IP_SW_RESET);
-       reset &= (~CPGMACSS_SW_RST);
-       writel(reset,AM3517_IP_SW_RESET);
+       if (gpio_request(PHY_GPIO, "gpio_30") == 0) {
+               /* activate PHY reset */
+               gpio_direction_output(PHY_GPIO, 0);
+               gpio_set_value(PHY_GPIO, 0);
+
+               ctr  = 0;
+               do {
+                       udelay(1000);
+                       ctr++;
+               } while (ctr < 300);
+
+               /* deactivate PHY reset */
+               gpio_set_value(PHY_GPIO, 1);
+
+               /* allow the PHY to stabilize and settle down */
+               ctr = 0;
+               do {
+                       udelay(1000);
+                       ctr++;
+               } while (ctr < 300);
+
+               /* ensure that the module is out of reset */
+               reset = readl(AM3517_IP_SW_RESET);
+               reset &= (~CPGMACSS_SW_RST);
+               writel(reset, AM3517_IP_SW_RESET);
+
+               /* Free requested GPIO */
+               gpio_free(PHY_GPIO);
+       }
 
        return 0;
 }