stm32f746-disco: enable flash support

[oweals/u-boot.git] / board / isee / igep00x0 / igep00x0.c

diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 2bac916576511b6ec889f4c5f8622d4a7631709a..d1a6a6f56f0211da5f8424ca95d64783150f661e 100644 (file)
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -2,29 +2,15 @@
  * (C) Copyright 2010
  * ISEE 2007 SL, <www.iseebcn.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
+#include <status_led.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <twl4030.h>
 #include <netdev.h>
 #include <asm/gpio.h>
-#include <asm/arch/omap_gpmc.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mmc_host_def.h>
@@ -47,6 +33,17 @@ static const u32 gpmc_lan_config[] = {
 };
 #endif
 
+static const struct ns16550_platdata igep_serial = {
+       .base = OMAP34XX_UART3,
+       .reg_shift = 2,
+       .clock = V_NS16550_CLK
+};
+
+U_BOOT_DEVICE(igep_uart) = {
+       "ns16550_serial",
+       &igep_serial
+};
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -57,21 +54,12 @@ int board_init(void)
        /* boot param addr */
        gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
 
-       return 0;
-}
-
-#if defined(CONFIG_SHOW_BOOT_PROGRESS) && !defined(CONFIG_SPL_BUILD)
-void show_boot_progress(int val)
-{
-       if (val < 0) {
-               /* something went wrong */
-               return;
-       }
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+       status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
+#endif
 
-       if (!gpio_request(IGEP00X0_GPIO_LED, ""))
-               gpio_direction_output(IGEP00X0_GPIO_LED, 1);
+       return 0;
 }
-#endif
 
 #ifdef CONFIG_SPL_BUILD
 /*
@@ -113,6 +101,19 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
 #endif
 
 #if defined(CONFIG_CMD_NET)
+
+static void reset_net_chip(int gpio)
+{
+       if (!gpio_request(gpio, "eth nrst")) {
+               gpio_direction_output(gpio, 1);
+               udelay(1);
+               gpio_set_value(gpio, 0);
+               udelay(40);
+               gpio_set_value(gpio, 1);
+               mdelay(10);
+       }
+}
+
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -122,8 +123,8 @@ static void setup_net_chip(void)
 {
        struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 
-       enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
-                       GPMC_SIZE_16M);
+       enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
+                       CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
 
        /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
        writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
@@ -133,15 +134,7 @@ static void setup_net_chip(void)
        writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
                &ctrl_base->gpmc_nadv_ale);
 
-       /* Make GPIO 64 as output pin and send a magic pulse through it */
-       if (!gpio_request(64, "")) {
-               gpio_direction_output(64, 0);
-               gpio_set_value(64, 1);
-               udelay(1);
-               gpio_set_value(64, 0);
-               udelay(1);
-               gpio_set_value(64, 1);
-       }
+       reset_net_chip(64);
 }
 #else
 static inline void setup_net_chip(void) {}
@@ -154,6 +147,25 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+#if defined(CONFIG_GENERIC_MMC)
+void board_mmc_power_init(void)
+{
+       twl4030_power_mmc_init(0);
+}
+#endif
+
+void set_fdt(void)
+{
+       switch (gd->bd->bi_arch_number) {
+       case MACH_TYPE_IGEP0020:
+               setenv("fdtfile", "omap3-igep0020.dtb");
+               break;
+       case MACH_TYPE_IGEP0030:
+               setenv("fdtfile", "omap3-igep0030.dtb");
+               break;
+       }
+}
+
 /*
  * Routine: misc_init_r
  * Description: Configure board specific parts
@@ -164,7 +176,9 @@ int misc_init_r(void)
 
        setup_net_chip();
 
-       dieid_num_r();
+       omap_die_id_display();
+
+       set_fdt();
 
        return 0;
 }
@@ -191,10 +205,10 @@ void set_muxconf_regs(void)
 #if defined(CONFIG_CMD_NET)
 int board_eth_init(bd_t *bis)
 {
-       int rc = 0;
 #ifdef CONFIG_SMC911X
-       rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+       return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#else
+       return 0;
 #endif
-       return rc;
 }
 #endif