imx: ventana: add support for DLC-700JMGT4 and DLC-800FIGT3 LCD displays

[oweals/u-boot.git] / board / gateworks / gw_ventana / gw_ventana.c

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 307ffa583e2be440874fe3fdc32a79e01739058e..d8eeb6d93161d82d16253a7ac2ee21a42d4ac506 100644 (file)
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -495,6 +495,48 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       /* DLC700JMG-T-4 */
+       .bus    = 0,
+       .addr   = 0,
+       .detect = NULL,
+       .enable = enable_lvds,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .mode   = {
+               .name           = "DLC700JMGT4",
+               .refresh        = 60,
+               .xres           = 1024,         /* 1024x600active pixels */
+               .yres           = 600,
+               .pixclock       = 15385,        /* 64MHz */
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       /* DLC800FIG-T-3 */
+       .bus    = 0,
+       .addr   = 0,
+       .detect = NULL,
+       .enable = enable_lvds,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .mode   = {
+               .name           = "DLC800FIGT3",
+               .refresh        = 60,
+               .xres           = 1024,         /* 1024x768 active pixels */
+               .yres           = 768,
+               .pixclock       = 15385,        /* 64MHz */
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
 } } };
 size_t display_count = ARRAY_SIZE(displays);
 
@@ -1598,6 +1640,17 @@ int ft_board_setup(void *blob, bd_t *bd)
        fdt_setprop(blob, 0, "board", info->model,
                    strlen((const char *)info->model) + 1);
 
+       /*
+        * disable serial2 node for GW54xx for compatibility with older
+        * 3.10.x kernel that improperly had this node enabled in the DT
+        */
+       if (board_type == GW54xx) {
+               i = fdt_path_offset(blob,
+                                   "/soc/aips-bus@02100000/serial@021ec000");
+               if (i)
+                       fdt_del_node(blob, i);
+       }
+
        /*
         * disable wdog1/wdog2 nodes for GW51xx below revC to work around
         * errata causing wdog timer to be unreliable.
@@ -1609,6 +1662,41 @@ int ft_board_setup(void *blob, bd_t *bd)
                        fdt_status_disabled(blob, i);
        }
 
+       /*
+        * isolate CSI0_DATA_EN for GW551x below revB to work around
+        * errata causing non functional digital video in (it is not hooked up)
+        */
+       else if (board_type == GW551x && rev == 'A') {
+               u32 *range = NULL;
+               int len;
+               const u32 *handle = NULL;
+
+               i = fdt_node_offset_by_compatible(blob, -1,
+                                                 "fsl,imx-tda1997x-video");
+               if (i)
+                       handle = fdt_getprop(blob, i, "pinctrl-0", NULL);
+               if (handle)
+                       i = fdt_node_offset_by_phandle(blob,
+                                                      fdt32_to_cpu(*handle));
+               if (i)
+                       range = (u32 *)fdt_getprop(blob, i, "fsl,pins", &len);
+               if (range) {
+                       len /= sizeof(u32);
+                       for (i = 0; i < len; i += 6) {
+                               u32 mux_reg = fdt32_to_cpu(range[i+0]);
+                               u32 conf_reg = fdt32_to_cpu(range[i+1]);
+                               /* mux PAD_CSI0_DATA_EN to GPIO */
+                               if (is_cpu_type(MXC_CPU_MX6Q) &&
+                                   mux_reg == 0x260 && conf_reg == 0x630)
+                                       range[i+3] = cpu_to_fdt32(0x5);
+                               else if (!is_cpu_type(MXC_CPU_MX6Q) &&
+                                   mux_reg == 0x08c && conf_reg == 0x3a0)
+                                       range[i+3] = cpu_to_fdt32(0x5);
+                       }
+                       fdt_setprop_inplace(blob, i, "fsl,pins", range, len);
+               }
+       }
+
        /*
         * Peripheral Config:
         *  remove nodes by alias path if EEPROM config tells us the