Merge git://git.denx.de/u-boot-mpc85xx

[oweals/u-boot.git] / board / freescale / t1040qds / ddr.c

diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 43f952f9c03b4e8fc21d5854adf5e48a510993a7..cb58d1e5245b8bb5f4445e2006cbfd9211557a5c 100644 (file)
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -11,6 +11,7 @@
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
+#include <asm/mpc85xx_gpio.h>
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -94,12 +95,28 @@ found:
        popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
        popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
                          DDR_CDR2_VREF_OVRD(70);       /* Vref = 70% */
+
+       /* optimize cpo for erratum A-009942 */
+       popts->cpo_sample = 0x69;
 #else
        popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
        popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
 #endif
 }
 
+#if defined(CONFIG_DEEP_SLEEP)
+void board_mem_sleep_setup(void)
+{
+       void __iomem *qixis_base = (void *)QIXIS_BASE;
+
+       /* does not provide HW signals for power management */
+       clrbits_8(qixis_base + 0x21, 0x2);
+       /* Disable MCKE isolation */
+       gpio_set_value(2, 0);
+       udelay(1);
+}
+#endif
+
 phys_size_t initdram(int board_type)
 {
        phys_size_t dram_size;
@@ -112,5 +129,10 @@ phys_size_t initdram(int board_type)
        dram_size *= 0x100000;
 
        puts("    DDR: ");
+
+#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
+       fsl_dp_resume();
+#endif
+
        return dram_size;
 }