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powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040
[oweals/u-boot.git]
/
board
/
freescale
/
t102xrdb
/
cpld.h
diff --git
a/board/freescale/t102xrdb/cpld.h
b/board/freescale/t102xrdb/cpld.h
index 5a3100f6070e29babc627cafe332861b4763f68c..db50f818fbb6606aebfd2f5e692906b448195ca7 100644
(file)
--- a/
board/freescale/t102xrdb/cpld.h
+++ b/
board/freescale/t102xrdb/cpld.h
@@
-43,3
+43,7
@@
void cpld_write(unsigned int reg, u8 value);
#define CPLD_LBMAP_RESET 0xFF
#define CPLD_LBMAP_SHIFT 0x03
#define CPLD_BOOT_SEL 0x80
+
+#define CPLD_PCIE_SGMII_MUX 0x80
+#define CPLD_OVERRIDE_BOOT_EN 0x01
+#define CPLD_OVERRIDE_MUX_EN 0x02 /* PCIE/2.5G-SGMII mux override enable */