Merge branch 'master' of git://git.denx.de/u-boot into master

[oweals/u-boot.git] / board / freescale / p1_p2_rdb_pc / tlb.c

diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index 6d2246387a6967b17644e2c39417723802a909e0..3e4dffd237df76f908add7249696af5fdc06a941 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -53,7 +53,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 1, BOOKE_PAGESZ_1M, 1),
 
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
        /* W**G* - Flash/promjet, localbus */
        /* This will be changed to *I*G* after relocation to RAM. */
        SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
@@ -85,7 +85,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, CONFIG_SYS_PMC_BASE, CONFIG_SYS_PMC_BASE_PHYS,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 10, BOOKE_PAGESZ_64K, 1),
-#endif
+#endif /* not SPL */
 
 #ifdef CONFIG_SYS_NAND_BASE
        /* *I*G - NAND */
@@ -94,7 +94,17 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        0, 7, BOOKE_PAGESZ_1M, 1),
 #endif
 
-#ifdef CONFIG_SYS_RAMBOOT
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+       /* L2SRAM */
+       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 8, BOOKE_PAGESZ_256K, 1),
+       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
+                     CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 12, BOOKE_PAGESZ_256K, 1),
+#else
        /* *I*G - eSDHC/eSPI/NAND boot */
        SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
                        MAS3_SX|MAS3_SW|MAS3_SR, 0,
@@ -106,9 +116,9 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 9, BOOKE_PAGESZ_1G, 1),
-#endif
-#endif
-
+#endif /* P1020MBG */
+#endif /* not L2 SRAM */
+#endif /* RAMBOOT/SPL */
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);