#include <i2c.h>
#include <fsl_esdhc.h>
#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#ifdef CONFIG_P1010RDB_PB
+#ifdef CONFIG_TARGET_P1010RDB_PB
setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
#endif
bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
bd->bi_memsize = CONFIG_SYS_L2_SIZE;
- probecpu();
+ arch_cpu_init();
get_clocks();
mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
CONFIG_SPL_RELOC_MALLOC_SIZE);
i2c_init_all();
- gd->ram_size = initdram(0);
+ dram_init();
#ifdef CONFIG_SPL_NAND_BOOT
puts("\nTertiary program loader running in sram...");
#else
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif