board/lx2160aqds: Update the DSPI status fixup

[oweals/u-boot.git] / board / freescale / mx6slevk / mx6slevk.c

diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 8afd5da49f605f9c0c40a18f688de8831d70b3db..453f281418d08040f7782d76396c6ee11afa264d 100644 (file)
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013 Freescale Semiconductor, Inc.
  *
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <asm/arch/clock.h>
@@ -16,19 +15,16 @@
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/spi.h>
 #include <asm/io.h>
 #include <linux/sizes.h>
 #include <common.h>
-#include <fsl_esdhc.h>
+#include <fsl_esdhc_imx.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <netdev.h>
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include "../common/pfuze.h"
-#include <usb.h>
-#include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -44,9 +40,6 @@ DECLARE_GLOBAL_DATA_PTR;
        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   |             \
        PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
 
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
-                     PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
 #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |            \
                        PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
                        PAD_CTL_DSE_80ohm | PAD_CTL_HYS |       \
@@ -123,25 +116,6 @@ static iomux_v3_cfg_t const fec_pads[] = {
        MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
-#ifdef CONFIG_MXC_SPI
-static iomux_v3_cfg_t ecspi1_pads[] = {
-       MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
-       MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
-       MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
-       MX6_PAD_ECSPI1_SS0__GPIO4_IO11  | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
-       return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 11)) : -1;
-}
-
-static void setup_spi(void)
-{
-       imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-}
-#endif
-
 static void setup_iomux_uart(void)
 {
        imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
@@ -171,7 +145,7 @@ int power_init_board(void)
        u32 switch_num = 6;
        u32 offset = PFUZE100_SW1CMODE;
 
-       ret = pmic_get("pfuze100", &dev);
+       ret = pmic_get("pfuze100@08", &dev);
        if (ret == -ENODEV)
                return 0;
 
@@ -223,49 +197,6 @@ static int setup_fec(void)
 }
 #endif
 
-#ifdef CONFIG_USB_EHCI_MX6
-#define USB_OTHERREGS_OFFSET   0x800
-#define UCTRL_PWR_POL          (1 << 9)
-
-static iomux_v3_cfg_t const usb_otg_pads[] = {
-       /* OTG1 */
-       MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(OTGID_PAD_CTRL),
-       /* OTG2 */
-       MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
-};
-
-static void setup_usb(void)
-{
-       imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
-                                        ARRAY_SIZE(usb_otg_pads));
-}
-
-int board_usb_phy_mode(int port)
-{
-       if (port == 1)
-               return USB_INIT_HOST;
-       else
-               return usb_phy_mode(port);
-}
-
-int board_ehci_hcd_init(int port)
-{
-       u32 *usbnc_usb_ctrl;
-
-       if (port > 1)
-               return -EINVAL;
-
-       usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
-                                port * 4);
-
-       /* Set Power polarity */
-       setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
-
-       return 0;
-}
-#endif
-
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -278,19 +209,10 @@ int board_init(void)
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-#ifdef CONFIG_MXC_SPI
-       gpio_request(IMX_GPIO_NR(4, 11), "spi_cs");
-       setup_spi();
-#endif
-
 #ifdef CONFIG_FEC_MXC
        setup_fec();
 #endif
 
-#ifdef CONFIG_USB_EHCI_MX6
-       setup_usb();
-#endif
-
        return 0;
 }
 
@@ -303,7 +225,7 @@ int checkboard(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7)
 #define USDHC2_CD_GPIO IMX_GPIO_NR(5, 0)
@@ -322,12 +244,15 @@ int board_mmc_getcd(struct mmc *mmc)
 
        switch (cfg->esdhc_base) {
        case USDHC1_BASE_ADDR:
+               gpio_request(USDHC1_CD_GPIO, "cd1_gpio");
                ret = !gpio_get_value(USDHC1_CD_GPIO);
                break;
        case USDHC2_BASE_ADDR:
+               gpio_request(USDHC2_CD_GPIO, "cd2_gpio");
                ret = !gpio_get_value(USDHC2_CD_GPIO);
                break;
        case USDHC3_BASE_ADDR:
+               gpio_request(USDHC3_CD_GPIO, "cd3_gpio");
                ret = !gpio_get_value(USDHC3_CD_GPIO);
                break;
        }