#include <asm/processor.h>
#include <asm/immap_86xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include "spd_sdram.h"
-#endif
-
void sdram_init(void);
long int fixed_sdram(void);
ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->ext_refrec = CFG_DDR_EXT_REFRESH;
+ ddr->timing_cfg_3 = CFG_DDR_TIMING_3;
ddr->timing_cfg_0 = CFG_DDR_TIMING_0;
ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
ddr->timing_cfg_2 = CFG_DDR_TIMING_2;