Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
[oweals/u-boot.git] / board / freescale / mpc8641hpcn / mpc8641hpcn.c
index 9b6b69e40aa2df2dd84a06b6f361aa013393688a..7422e6b9d06f081848e59eb77476e0cfc7eca57d 100644 (file)
@@ -24,7 +24,7 @@
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
-#include <asm/immap_fsl_pci.h>
+#include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <libfdt.h>
@@ -46,6 +46,9 @@ int checkboard(void)
                "System Version: 0x%02x, FPGA Version: 0x%02x\n",
                in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
                in8(PIXIS_BASE + PIXIS_PVER));
+#ifdef CONFIG_PHYS_64BIT
+       printf ("       36-bit physical address map\n");
+#endif
        return 0;
 }
 
@@ -130,9 +133,6 @@ static struct pci_controller pci2_hose;
 
 int first_free_busno = 0;
 
-extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
-extern void fsl_pci_init(struct pci_controller *hose);
-
 void pci_init_board(void)
 {
 #ifdef CONFIG_PCI1
@@ -165,14 +165,14 @@ void pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_MEM_BASE,
+                              CONFIG_SYS_PCI1_MEM_BUS,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_IO_BASE,
+                              CONFIG_SYS_PCI1_IO_BUS,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
@@ -195,7 +195,7 @@ void pci_init_board(void)
                 * Activate ULI1575 legacy chip by performing a fake
                 * memory access.  Needed to make ULI RTC work.
                 */
-               in_be32((unsigned *) ((char *)(CONFIG_SYS_PCI1_MEM_BASE
+               in_be32((unsigned *) ((char *)(CONFIG_SYS_PCI1_MEM_VIRT
                                       + CONFIG_SYS_PCI1_MEM_SIZE - 0x1000000)));
 
        } else {
@@ -214,14 +214,14 @@ void pci_init_board(void)
 
        /* outbound memory */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_MEM_BASE,
+                      CONFIG_SYS_PCI2_MEM_BUS,
                       CONFIG_SYS_PCI2_MEM_PHYS,
                       CONFIG_SYS_PCI2_MEM_SIZE,
                       PCI_REGION_MEM);
 
        /* outbound io */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_IO_BASE,
+                      CONFIG_SYS_PCI2_IO_BUS,
                       CONFIG_SYS_PCI2_IO_PHYS,
                       CONFIG_SYS_PCI2_IO_SIZE,
                       PCI_REGION_IO);
@@ -248,9 +248,6 @@ void pci_init_board(void)
 
 
 #if defined(CONFIG_OF_BOARD_SETUP)
-extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
-                       struct pci_controller *hose);
-
 void
 ft_board_setup(void *blob, bd_t *bd)
 {
@@ -363,3 +360,20 @@ int board_eth_init(bd_t *bis)
        cpu_eth_init(bis);
        return pci_eth_init(bis);
 }
+
+void board_reset(void)
+{
+       out8(PIXIS_BASE + PIXIS_RST, 0);
+
+       while (1)
+               ;
+}
+
+#ifdef CONFIG_MP
+extern void cpu_mp_lmb_reserve(struct lmb *lmb);
+
+void board_lmb_reserve(struct lmb *lmb)
+{
+       cpu_mp_lmb_reserve(lmb);
+}
+#endif