#include <asm/mmu.h>
#include <asm/cache.h>
#include <asm/immap_85xx.h>
-#include <asm/immap_fsl_pci.h>
+#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/io.h>
#include <miiphy.h>
int checkboard (void)
{
- printf ("Board: MPC8572DS, System ID: 0x%02x, "
- "System Version: 0x%02x, FPGA Version: 0x%02x\n",
+ puts ("Board: MPC8572DS ");
+#ifdef CONFIG_PHYS_64BIT
+ puts ("(36-bit addrmap) ");
+#endif
+ printf ("Sys ID: 0x%02x, "
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
in8(PIXIS_BASE + PIXIS_PVER));
return 0;
static struct pci_controller pcie3_hose;
#endif
-extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
-extern void fsl_pci_init(struct pci_controller *hose);
-
int first_free_busno=0;
#ifdef CONFIG_PCI
void pci_init_board(void)
return 0;
}
+#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_init(tsec_info, num);
+#endif
tsec_eth_init(bis, tsec_info, num);
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
-extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
- struct pci_controller *hose);
-
void ft_board_setup(void *blob, bd_t *bd)
{
- ulong base, size;
+ phys_addr_t base;
+ phys_size_t size;
ft_cpu_setup(blob, bd);
#ifdef CONFIG_PCIE1
ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
#endif
+#ifdef CONFIG_FSL_SGMII_RISER
+ fsl_sgmii_riser_fdt_fixup(blob);
+#endif
}
#endif