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Fix IO port selection issue on MPC8544DS and MPC8572DS boards
[oweals/u-boot.git] / board / freescale / mpc8572ds / mpc8572ds.c
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index b2402dcc9fd59b1c73db1c8eb4936fbfd0ee731e..4733b82f0558a278a1a598c4cf4e7d7fb61f0e73 100644 (file)
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -38,10 +38,6 @@
 #include "../common/pixis.h"
 #include "../common/sgmii_riser.h"
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
 long int fixed_sdram(void);
 
 int checkboard (void)
@@ -61,20 +57,12 @@ phys_size_t initdram(int board_type)
 
 #ifdef CONFIG_SPD_EEPROM
        dram_size = fsl_ddr_sdram();
-
-       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-
-       dram_size *= 0x100000;
 #else
        dram_size = fixed_sdram();
 #endif
+       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+       dram_size *= 0x100000;
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-       /*
-        * Initialize and enable DDR ECC.
-        */
-       ddr_enable_ecc(dram_size);
-#endif
        puts("    DDR: ");
        return dram_size;
 }
@@ -147,6 +135,9 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 int first_free_busno=0;
 #ifdef CONFIG_PCI
 void pci_init_board(void)
@@ -172,11 +163,11 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE3
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie3_hose;
                int pcie_ep = (host_agent == 0) || (host_agent == 3) ||
                        (host_agent == 5) || (host_agent == 6);
-               int pcie_configured  = io_sel >= 1;
+               int pcie_configured  = (io_sel == 0x7);
+               struct pci_region *r = hose->regions;
                u32 temp32;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
@@ -190,27 +181,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE3_MEM_BASE,
                                        CONFIG_SYS_PCIE3_MEM_PHYS,
                                        CONFIG_SYS_PCIE3_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE3_IO_BASE,
                                        CONFIG_SYS_PCIE3_IO_PHYS,
                                        CONFIG_SYS_PCIE3_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -244,11 +231,11 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE2
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie2_hose;
                int pcie_ep = (host_agent == 2) || (host_agent == 4) ||
                        (host_agent == 6) || (host_agent == 0);
-               int pcie_configured  = io_sel & 4;
+               int pcie_configured  = (io_sel == 0x3) || (io_sel == 0x7);
+               struct pci_region *r = hose->regions;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                        printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)",
@@ -261,27 +248,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE2_MEM_BASE,
                                        CONFIG_SYS_PCIE2_MEM_PHYS,
                                        CONFIG_SYS_PCIE2_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE2_IO_BASE,
                                        CONFIG_SYS_PCIE2_IO_PHYS,
                                        CONFIG_SYS_PCIE2_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -301,11 +284,13 @@ void pci_init_board(void)
 #ifdef CONFIG_PCIE1
        {
                volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-               extern void fsl_pci_init(struct pci_controller *hose);
                struct pci_controller *hose = &pcie1_hose;
                int pcie_ep = (host_agent <= 1) || (host_agent == 4) ||
                        (host_agent == 5);
-               int pcie_configured  = io_sel & 6;
+               int pcie_configured  = (io_sel == 0x2) || (io_sel == 0x3) ||
+                                       (io_sel == 0x7) || (io_sel == 0xb) ||
+                                       (io_sel == 0xc) || (io_sel == 0xf);
+               struct pci_region *r = hose->regions;
 
                if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                        printf ("\n    PCIE1 connected to Slot 2 as %s (base address %x)",
@@ -318,27 +303,23 @@ void pci_init_board(void)
                        printf ("\n");
 
                        /* inbound */
-                       pci_set_region(hose->regions + 0,
-                                       CONFIG_SYS_PCI_MEMORY_BUS,
-                                       CONFIG_SYS_PCI_MEMORY_PHYS,
-                                       CONFIG_SYS_PCI_MEMORY_SIZE,
-                                       PCI_REGION_MEM | PCI_REGION_MEMORY);
+                       r += fsl_pci_setup_inbound_windows(r);
 
                        /* outbound memory */
-                       pci_set_region(hose->regions + 1,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE1_MEM_BASE,
                                        CONFIG_SYS_PCIE1_MEM_PHYS,
                                        CONFIG_SYS_PCIE1_MEM_SIZE,
                                        PCI_REGION_MEM);
 
                        /* outbound io */
-                       pci_set_region(hose->regions + 2,
+                       pci_set_region(r++,
                                        CONFIG_SYS_PCIE1_IO_BASE,
                                        CONFIG_SYS_PCIE1_IO_PHYS,
                                        CONFIG_SYS_PCIE1_IO_SIZE,
                                        PCI_REGION_IO);
 
-                       hose->region_count = 3;
+                       hose->region_count = r - hose->regions;
                        hose->first_busno=first_free_busno;
 
                        pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -371,8 +352,8 @@ int board_early_init_r(void)
         */
 
        /* Flush d-cache and invalidate i-cache of any FLASH data */
-        flush_dcache();
-        invalidate_icache();
+       flush_dcache();
+       invalidate_icache();
 
        /* invalidate existing TLB entry for flash + promjet */
        disable_tlb(flash_esel);
@@ -568,10 +549,11 @@ int board_eth_init(bd_t *bis)
 #endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                       struct pci_controller *hose);
+
 void ft_board_setup(void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
        ulong base, size;
 
        ft_cpu_setup(blob, bd);
@@ -581,31 +563,15 @@ void ft_board_setup(void *blob, bd_t *bd)
 
        fdt_fixup_memory(blob, (u64)base, (u64)size);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCIE3
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
 #endif
 #ifdef CONFIG_PCIE2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif
-       }
 }
 #endif
 
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