Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

[oweals/u-boot.git] / board / freescale / mpc8569mds / bcsr.c

diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c
index f46259726080485d61a020a7c6c36129345ece71..b688e5cc73e84c06228e6c7493e731d367f66b2c 100644 (file)
--- a/board/freescale/mpc8569mds/bcsr.c
+++ b/board/freescale/mpc8569mds/bcsr.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2009 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -35,12 +35,29 @@ void disable_8569mds_flash_write()
        clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
 }
 
-void enable_8569mds_qe_mdio()
+void enable_8569mds_qe_uec()
 {
+#if defined(CONFIG_SYS_UCC_RGMII_MODE)
        setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
                        BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
        setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
                        BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
+       setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
+                       BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
+       setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
+                       BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
+#elif defined(CONFIG_SYS_UCC_RMII_MODE)
+       /* Set UCC1-4 working at RMII mode */
+       clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
+                       BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
+       clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
+                       BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
+       clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
+                       BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
+       clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
+                       BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
+       setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN);
+#endif
 }
 
 void disable_8569mds_brd_eeprom_write_protect()