Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
[oweals/u-boot.git] / board / freescale / mpc8548cds / tlb.c
index eab212a4c5c0ae2603a3f4925b8e354a56bd8f0d..2267ad7478c72bdf46f3d80631167eabafc09de1 100644 (file)
@@ -54,7 +54,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * TLB 1:       1G      Non-cacheable, guarded
         * 0x80000000   1G      PCI1/PCIE  8,9,a,b
         */
-       SET_TLB_ENTRY(1, CONFIG_SYS_PCI_PHYS, CONFIG_SYS_PCI_PHYS,
+       SET_TLB_ENTRY(1, CONFIG_SYS_PCI_VIRT, CONFIG_SYS_PCI_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 1, BOOKE_PAGESZ_1G, 1),
 
@@ -62,14 +62,14 @@ struct fsl_e_tlb_entry tlb_table[] = {
        /*
         * TLB 2:       256M    Non-cacheable, guarded
         */
-       SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BASE, CONFIG_SYS_RIO_MEM_BASE,
+       SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_VIRT, CONFIG_SYS_RIO_MEM_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 2, BOOKE_PAGESZ_256M, 1),
 
        /*
         * TLB 3:       256M    Non-cacheable, guarded
         */
-       SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_BASE + 0x10000000, CONFIG_SYS_RIO_MEM_BASE + 0x10000000,
+       SET_TLB_ENTRY(1, CONFIG_SYS_RIO_MEM_VIRT + 0x10000000, CONFIG_SYS_RIO_MEM_PHYS + 0x10000000,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 3, BOOKE_PAGESZ_256M, 1),
 #endif