/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2011 Freescale Semiconductor.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ char buf[32];
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
+ strmhz(buf, pci1_speed),
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
uint cpu_board_rev;
uint lsdmr_common;
- puts(" SDRAM: ");
-
- print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+ puts("LBC SDRAM: ");
+ print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+ "\n ");
/*
* Setup SDRAM Base and Option Registers