Merge branch 'master' of git://git.denx.de/u-boot-samsung

[oweals/u-boot.git] / board / freescale / mpc8540ads / mpc8540ads.c

diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index 7dccd3735924e7b06c77a3dd635984b35ae2ec0c..d354a26f69a45f3fae22215df3ec12e3a5e535f9 100644 (file)
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -47,10 +47,10 @@ int checkboard (void)
        puts("Board: ADS\n");
 
 #ifdef CONFIG_PCI
-       printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+       printf("PCI1: 32 bit, %d MHz (compiled)\n",
               CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-       printf("    PCI1: disabled\n");
+       printf("PCI1: disabled\n");
 #endif
 
        /*
@@ -117,7 +117,7 @@ void
 local_bus_init(void)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 
        uint clkdiv;
        uint lbc_hz;
@@ -127,13 +127,13 @@ local_bus_init(void)
         * Errata LBC11.
         * Fix Local Bus clock glitch when DLL is enabled.
         *
-        * If localbus freq is < 66Mhz, DLL bypass mode must be used.
-        * If localbus freq is > 133Mhz, DLL can be safely enabled.
+        * If localbus freq is < 66MHz, DLL bypass mode must be used.
+        * If localbus freq is > 133MHz, DLL can be safely enabled.
         * Between 66 and 133, the DLL is enabled with an override workaround.
         */
 
        get_sys_info(&sysinfo);
-       clkdiv = lbc->lcrr & 0x0f;
+       clkdiv = lbc->lcrr & LCRR_CLKDIV;
        lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
 
        if (lbc_hz < 66) {
@@ -176,7 +176,7 @@ local_bus_init(void)
 void
 sdram_init(void)
 {
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
 
        puts("    SDRAM: ");
@@ -185,8 +185,8 @@ sdram_init(void)
        /*
         * Setup SDRAM Base and Option Registers
         */
-       lbc->or2 = CONFIG_SYS_OR2_PRELIM;
-       lbc->br2 = CONFIG_SYS_BR2_PRELIM;
+       set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
+       set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
        lbc->lbcr = CONFIG_SYS_LBC_LBCR;
        asm("msync");