mx53ard: Initialize return code with error
[oweals/u-boot.git] / board / freescale / mpc8349emds / pci.c
index 9c19e303f9634d6955e457c006fafadf796a9361..832477f28100c627dbfec471afb718a1916e0615 100644 (file)
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_PCI
-
 static struct pci_region pci1_regions[] = {
        {
-               bus_start: CFG_PCI1_MEM_BASE,
-               phys_start: CFG_PCI1_MEM_PHYS,
-               size: CFG_PCI1_MEM_SIZE,
+               bus_start: CONFIG_SYS_PCI1_MEM_BASE,
+               phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
+               size: CONFIG_SYS_PCI1_MEM_SIZE,
                flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
        },
        {
-               bus_start: CFG_PCI1_IO_BASE,
-               phys_start: CFG_PCI1_IO_PHYS,
-               size: CFG_PCI1_IO_SIZE,
+               bus_start: CONFIG_SYS_PCI1_IO_BASE,
+               phys_start: CONFIG_SYS_PCI1_IO_PHYS,
+               size: CONFIG_SYS_PCI1_IO_SIZE,
                flags: PCI_REGION_IO
        },
        {
-               bus_start: CFG_PCI1_MMIO_BASE,
-               phys_start: CFG_PCI1_MMIO_PHYS,
-               size: CFG_PCI1_MMIO_SIZE,
+               bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
+               phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
+               size: CONFIG_SYS_PCI1_MMIO_SIZE,
                flags: PCI_REGION_MEM
        },
 };
@@ -55,21 +55,21 @@ static struct pci_region pci1_regions[] = {
 #ifdef CONFIG_MPC83XX_PCI2
 static struct pci_region pci2_regions[] = {
        {
-               bus_start: CFG_PCI2_MEM_BASE,
-               phys_start: CFG_PCI2_MEM_PHYS,
-               size: CFG_PCI2_MEM_SIZE,
+               bus_start: CONFIG_SYS_PCI2_MEM_BASE,
+               phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
+               size: CONFIG_SYS_PCI2_MEM_SIZE,
                flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
        },
        {
-               bus_start: CFG_PCI2_IO_BASE,
-               phys_start: CFG_PCI2_IO_PHYS,
-               size: CFG_PCI2_IO_SIZE,
+               bus_start: CONFIG_SYS_PCI2_IO_BASE,
+               phys_start: CONFIG_SYS_PCI2_IO_PHYS,
+               size: CONFIG_SYS_PCI2_IO_SIZE,
                flags: PCI_REGION_IO
        },
        {
-               bus_start: CFG_PCI2_MMIO_BASE,
-               phys_start: CFG_PCI2_MMIO_PHYS,
-               size: CFG_PCI2_MMIO_SIZE,
+               bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
+               phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
+               size: CONFIG_SYS_PCI2_MMIO_SIZE,
                flags: PCI_REGION_MEM
        },
 };
@@ -135,7 +135,7 @@ void pib_init(void)
 
 void pci_init_board(void)
 {
-       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
 #ifndef CONFIG_MPC83XX_PCI2
@@ -152,44 +152,37 @@ void pci_init_board(void)
        udelay(2000);
 
        /* Configure PCI Local Access Windows */
-       pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
-       pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }
 
 #else
 void pci_init_board(void)
 {
-       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
-       volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
        volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
        struct pci_region *reg[] = { pci1_regions };
 
-       /* Enable all 8 PCI_CLK_OUTPUTS */
-       clk->occr = 0xff000000;
-       udelay(2000);
-
        /* Configure PCI Local Access Windows */
-       pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
-       pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
-       udelay(2000);
-
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 
        /* Configure PCI Inbound Translation Windows (3 1MB windows) */
        pci_ctrl->pitar0 = 0x0;
@@ -214,5 +207,3 @@ void pci_init_board(void)
        printf("PCI:   Agent mode enabled\n");
 }
 #endif /* CONFIG_PCISLAVE */
-
-#endif /* CONFIG_PCI */