mpc83xx: Get rid of CONFIG_SYS_LBC_*

[oweals/u-boot.git] / board / freescale / mpc8313erdb / sdram.c

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 5e074e3d87b3b348031164ea31021215813257f5..c8e30a094784d8e0cfcdbdd676be99f45859ae1a 100644 (file)
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -47,7 +47,7 @@ static long fixed_sdram(void)
        volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
+       im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
        im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
 
@@ -57,12 +57,12 @@ static long fixed_sdram(void)
         */
        __udelay(50000);
 
-#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0)
+#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
 #warning Chip select bounds is only configurable in 16MB increments
 #endif
        im->ddr.csbnds[0].csbnds =
-               ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
-               (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
+               ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
+               (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
                        CSBNDS_EA);
        im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
 
@@ -109,8 +109,9 @@ int dram_init(void)
        msize = fixed_sdram();
 
        /* Local Bus setup lbcr and mrtpr */
-       lbc->lbcr = CONFIG_SYS_LBC_LBCR;
-       lbc->mrtpr = CONFIG_SYS_LBC_MRTPR;
+       lbc->lbcr = (0x00040000 | (0xFF << LBCR_BMT_SHIFT) | 0xF);
+       /* LB refresh timer prescal, 266MHz/32 */
+       lbc->mrtpr = 0x20000000;
        sync();
 
 #ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC