da850: provide davinci_enable_uart0

[oweals/u-boot.git] / board / freescale / mpc5121ads / mpc5121ads.c

diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index b356a478b3114323662e01f63285886768a87d71..33a8aa51847d4e91b6287889349c11f6f9f5e988 100644 (file)
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -38,25 +38,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Clocks in use */
-#define SCCR1_CLOCKS_EN        (CLOCK_SCCR1_CFG_EN |                           \
-                        CLOCK_SCCR1_DDR_EN |                           \
-                        CLOCK_SCCR1_FEC_EN |                           \
-                        CLOCK_SCCR1_LPC_EN |                           \
-                        CLOCK_SCCR1_NFC_EN |                           \
-                        CLOCK_SCCR1_PATA_EN |                          \
-                        CLOCK_SCCR1_PCI_EN |                           \
-                        CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |       \
-                        CLOCK_SCCR1_PSCFIFO_EN |                       \
-                        CLOCK_SCCR1_TPR_EN)
-
-#define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_DIU_EN |           \
-                        CLOCK_SCCR2_I2C_EN |           \
-                        CLOCK_SCCR2_MEM_EN |           \
-                        CLOCK_SCCR2_SPDIF_EN |         \
-                        CLOCK_SCCR2_USB1_EN |          \
-                        CLOCK_SCCR2_USB2_EN)
-
 void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip);
 
 /* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */
@@ -83,20 +64,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 
 int board_early_init_f(void)
 {
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       u32 spridr;
-
-       /*
-        * Initialize Local Window for the CPLD registers access (CS2 selects
-        * the CPLD chip)
-        */
-       out_be32(&im->sysconf.lpcs2aw,
-               CSAW_START(CONFIG_SYS_CPLD_BASE) |
-               CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE)
-       );
-       out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
-       sync_law(&im->sysconf.lpcs2aw);
-
        /*
         * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
         *
@@ -114,25 +81,6 @@ int board_early_init_f(void)
                out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32);
        }
 #endif
-       /*
-        * Configure Flash Speed
-        */
-       out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
-       spridr = in_be32(&im->sysconf.spridr);
-
-       if (SVR_MJREV (spridr) >= 2)
-               out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
-       /*
-        * Enable clocks
-        */
-       out_be32 (&im->clk.sccr[0], SCCR1_CLOCKS_EN);
-       out_be32 (&im->clk.sccr[1], SCCR2_CLOCKS_EN);
-#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
-       setbits_be32 (&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
-#endif
-
        return 0;
 }
 
@@ -253,14 +201,14 @@ int misc_init_r(void)
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
        tmp_val = 0x10;
        i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
        return 0;
 }