Merge tag 'efi-2020-07-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[oweals/u-boot.git] / board / freescale / common / p_corenet / tlb.c

diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index 8148e46efa6728cb9216a173bbc8f3a96c33dbfc..c0ab1a5fd14e337ba4ef0998a4fb683ee78068dd 100644 (file)
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -43,6 +42,8 @@ struct fsl_e_tlb_entry tlb_table[] = {
        /* TLB 1 */
        /* *I*** - Covers boot page */
 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR)
+
+#if !defined(CONFIG_NXP_ESBC)
        /*
         * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the
         * SRAM is at 0xfff00000, it covered the 0xfffff000.
@@ -50,6 +51,19 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 0, BOOKE_PAGESZ_1M, 1),
+#else
+       /*
+        * *I*G - L3SRAM. When L3 is used as 1M SRAM, in case of Secure Boot
+        * the physical address of the SRAM is at CONFIG_SYS_INIT_L3_ADDR,
+        * and virtual address is CONFIG_SYS_MONITOR_BASE
+        */
+
+       SET_TLB_ENTRY(1, CONFIG_SYS_MONITOR_BASE & 0xfff00000,
+                       CONFIG_SYS_INIT_L3_ADDR & 0xfff00000,
+                       MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                       0, 0, BOOKE_PAGESZ_1M, 1),
+#endif
+
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
        /*
         * SRIO_PCIE_BOOT-SLAVE. When slave boot, the address of the