*
* Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
/* ------------------------------------------------------------------------- */
static int _draminit (uint base, uint noMbytes, uint edo, uint delay)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
/* init upm */
switch (noMbytes) {
case 4: /* 4 Mbyte uses only CS2 */
-#ifdef CONFIG_ADS
- memctl->memc_mamr = 0xc0a21114;
-#else
memctl->memc_mamr = 0x13a01114; /* PTA 0x13 AMA 010 */
-#endif
memctl->memc_or2 = 0xffc00800; /* 4M */
break;
break;
case 16: /* 16 Mbyte uses only CS2 */
-#ifdef CONFIG_ADS /* XXX: why PTA=0x60 only in 16M case? - NTL */
- memctl->memc_mamr = 0x60b21114; /* PTA 0x60 AMA 011 */
-#else
memctl->memc_mamr = 0x13b01114; /* PTA 0x13 AMA 011 */
-#endif
memctl->memc_or2 = 0xff000800; /* 16M */
break;
static void _dramdisable(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_br2 = 0x00000000;
static int _initsdram(uint base, uint noMbytes)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
/* Now run the precharge/nop/mrs commands.
*/
- memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50Mhz) */
- /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100Mhz) */
+ memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50MHz) */
+ /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100MHz) */
udelay(200);
/* Run 8 refresh cycles */
- memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 Mhz)*/
+ memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 MHz)*/
/* run upmb cs4 loop 1 addr 0x11 precharge+MRS (100MHz) */
udelay(200);
- memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 Mhz) or TLF 8 (50MHz) */
- memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 Mhz) */
+ memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 MHz) or TLF 8 (50MHz) */
+ memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 MHz) */
/* run upmb cs4 loop 1 addr 0x11 precharge+MRS ??? (100MHz) */
udelay(200);
static int _initsdram(uint base, uint noMbytes)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
static void _sdramdisable(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_br4 = 0x00000000;
static int initsdram(uint base, uint *noMbytes)
{
- uint m = CFG_SDRAM_SIZE>>20;
+ uint m = CONFIG_SYS_SDRAM_SIZE>>20;
/* _initsdram needs access to sdram */
*((uint *)BCSR1) |= BCSR1_SDRAM_EN; /* enable sdram */
if(!_initsdram(base, m))
{
- *noMbytes += m;
+ *noMbytes += m;
return 0;
}
else
/* ========================================================================= */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
uint sdramsz = 0; /* size of sdram in Mbytes */
- uint base = 0; /* base of dram in bytes */
uint m = 0; /* size of dram in Mbytes */
#ifndef CONFIG_MPC885ADS
+ uint base = 0; /* base of dram in bytes */
uint k, s;
#endif
#ifdef CONFIG_FADS
if (!initsdram (0x00000000, &sdramsz)) {
+#ifndef CONFIG_MPC885ADS
base = sdramsz << 20;
+#endif
printf ("(%u MB SDRAM) ", sdramsz);
}
#endif
* Check Board Identity:
*/
-#if defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD)
-static void checkdboard(void)
-{
- /* get db type from BCSR 3 */
- uint k = (*((uint *)BCSR3) >> 24) & 0x3f;
-
- puts (" with db ");
-
- switch(k) {
- case 0x03 :
- puts ("MPC823");
- break;
- case 0x20 :
- puts ("MPC801");
- break;
- case 0x21 :
- puts ("MPC850");
- break;
- case 0x22 :
- puts ("MPC821, MPC860 / MPC860SAR / MPC860T");
- break;
- case 0x23 :
- puts ("MPC860SAR");
- break;
- case 0x24 :
- case 0x2A :
- puts ("MPC860T");
- break;
- case 0x3F :
- puts ("MPC850SAR");
- break;
- default : printf("0x%x", k);
- }
-}
-#endif /* defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD) */
-
int checkboard (void)
{
#if defined(CONFIG_MPC86xADS)
puts (" rev ");
switch (r) {
-#if defined(CONFIG_ADS)
- case 0x00:
- puts ("ENG - this board sucks, check the errata, not supported\n");
- return -1;
- case 0x01:
- puts ("PILOT - warning, read errata \n");
- break;
- case 0x02:
- puts ("A - warning, read errata \n");
- break;
- case 0x03:
- puts ("B\n");
- break;
-#else /* FADS */
case 0x00:
puts ("ENG\n");
break;
case 0x01:
puts ("PILOT\n");
break;
-#endif /* CONFIG_ADS */
default:
printf ("unknown (0x%x)\n", r);
return -1;
/* ========================================================================= */
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
+#ifdef CONFIG_SYS_PCMCIA_MEM_ADDR
+volatile unsigned char *pcmcia_mem = (unsigned char*)CONFIG_SYS_PCMCIA_MEM_ADDR;
#endif
int pcmcia_init(void)
/*
** Enable the PCMCIA for a Flash card.
*/
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
#if 0
- pcmp->pcmc_pbr0 = CFG_PCMCIA_MEM_ADDR;
+ pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_MEM_ADDR;
pcmp->pcmc_por0 = 0xc00ff05d;
#endif
#endif
case 5:
printf("; using 5V");
-#ifdef CONFIG_ADS
- /*
- ** Enable 5 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCCON;
-#endif
#ifdef CONFIG_FADS
/*
** Enable 5 volt Vcc.
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
/* ========================================================================= */
-#ifdef CFG_PC_IDE_RESET
+#ifdef CONFIG_SYS_PC_IDE_RESET
void ide_set_reset(int on)
{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
/*
* Configure PC for IDE Reset Pin
*/
if (on) { /* assert RESET */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET);
+ immr->im_ioport.iop_pcdat &= ~(CONFIG_SYS_PC_IDE_RESET);
} else { /* release RESET */
- immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET;
+ immr->im_ioport.iop_pcdat |= CONFIG_SYS_PC_IDE_RESET;
}
/* program port pin as GPIO output */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET;
+ immr->im_ioport.iop_pcpar &= ~(CONFIG_SYS_PC_IDE_RESET);
+ immr->im_ioport.iop_pcso &= ~(CONFIG_SYS_PC_IDE_RESET);
+ immr->im_ioport.iop_pcdir |= CONFIG_SYS_PC_IDE_RESET;
}
-#endif /* CFG_PC_IDE_RESET */
+#endif /* CONFIG_SYS_PC_IDE_RESET */
projects / oweals / u-boot.git / blobdiff