Merge git://www.denx.de/git/u-boot

[oweals/u-boot.git] / board / esd / cpci750 / cpci750.c

diff --git a/board/esd/cpci750/cpci750.c b/board/esd/cpci750/cpci750.c
index fd0f904cfe4f159faf35a329b8a73d3d5391348d..298aa6a195f6bca3fb6e216cb4296e1580354836 100644 (file)
--- a/board/esd/cpci750/cpci750.c
+++ b/board/esd/cpci750/cpci750.c
@@ -29,6 +29,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <74xx_7xx.h>
 #include "../../Marvell/include/memory.h"
 #include "../../Marvell/include/pci.h"
@@ -54,6 +55,71 @@
 #define DP(x)
 #endif
 
+static char show_config_tab[][15] = {{"PCI0DLL_2     "},  /* 31 */
+                                    {"PCI0DLL_1     "},  /* 30 */
+                                    {"PCI0DLL_0     "},  /* 29 */
+                                    {"PCI1DLL_2     "},  /* 28 */
+                                    {"PCI1DLL_1     "},  /* 27 */
+                                    {"PCI1DLL_0     "},  /* 26 */
+                                    {"BbEP2En       "},  /* 25 */
+                                    {"SDRAMRdDataDel"},  /* 24 */
+                                    {"SDRAMRdDel    "},  /* 23 */
+                                    {"SDRAMSync     "},  /* 22 */
+                                    {"SDRAMPipeSel_1"},  /* 21 */
+                                    {"SDRAMPipeSel_0"},  /* 20 */
+                                    {"SDRAMAddDel   "},  /* 19 */
+                                    {"SDRAMClkSel   "},  /* 18 */
+                                    {"Reserved(1!)  "},  /* 17 */
+                                    {"PCIRty        "},  /* 16 */
+                                    {"BootCSWidth_1 "},  /* 15 */
+                                    {"BootCSWidth_0 "},  /* 14 */
+                                    {"PCI1PadsCal   "},  /* 13 */
+                                    {"PCI0PadsCal   "},  /* 12 */
+                                    {"MultiMVId_1   "},  /* 11 */
+                                    {"MultiMVId_0   "},  /* 10 */
+                                    {"MultiGTEn     "},  /* 09 */
+                                    {"Int60xArb     "},  /* 08 */
+                                    {"CPUBusConfig_1"},  /* 07 */
+                                    {"CPUBusConfig_0"},  /* 06 */
+                                    {"DefIntSpc     "},  /* 05 */
+                                    {0               },  /* 04 */
+                                    {"SROMAdd_1     "},  /* 03 */
+                                    {"SROMAdd_0     "},  /* 02 */
+                                    {"DRAMPadCal    "},  /* 01 */
+                                    {"SInitEn       "},  /* 00 */
+                                    {0               },  /* 31 */
+                                    {0               },  /* 30 */
+                                    {0               },  /* 29 */
+                                    {0               },  /* 28 */
+                                    {0               },  /* 27 */
+                                    {0               },  /* 26 */
+                                    {0               },  /* 25 */
+                                    {0               },  /* 24 */
+                                    {0               },  /* 23 */
+                                    {0               },  /* 22 */
+                                    {"JTAGCalBy     "},  /* 21 */
+                                    {"GB2Sel        "},  /* 20 */
+                                    {"GB1Sel        "},  /* 19 */
+                                    {"DRAMPLL_MDiv_5"},  /* 18 */
+                                    {"DRAMPLL_MDiv_4"},  /* 17 */
+                                    {"DRAMPLL_MDiv_3"},  /* 16 */
+                                    {"DRAMPLL_MDiv_2"},  /* 15 */
+                                    {"DRAMPLL_MDiv_1"},  /* 14 */
+                                    {"DRAMPLL_MDiv_0"},  /* 13 */
+                                    {"GB0Sel        "},  /* 12 */
+                                    {"DRAMPLLPU     "},  /* 11 */
+                                    {"DRAMPLL_HIKVCO"},  /* 10 */
+                                    {"DRAMPLLNP     "},  /* 09 */
+                                    {"DRAMPLL_NDiv_7"},  /* 08 */
+                                    {"DRAMPLL_NDiv_6"},  /* 07 */
+                                    {"CPUPadCal     "},  /* 06 */
+                                    {"DRAMPLL_NDiv_5"},  /* 05 */
+                                    {"DRAMPLL_NDiv_4"},  /* 04 */
+                                    {"DRAMPLL_NDiv_3"},  /* 03 */
+                                    {"DRAMPLL_NDiv_2"},  /* 02 */
+                                    {"DRAMPLL_NDiv_1"},  /* 01 */
+                                    {"DRAMPLL_NDiv_0"}}; /* 00 */
+
 extern void flush_data_cache (void);
 extern void invalidate_l1_instruction_cache (void);
 extern flash_info_t flash_info[];
@@ -365,12 +431,12 @@ int misc_init_r ()
        dcache_lock ();
 #endif
        if (flash_info[3].size < CFG_FLASH_INCREMENT) {
-               unsigned int flash_offset;
+               unsigned int flash_offset;
                unsigned int l;
 
                flash_offset =  CFG_FLASH_INCREMENT - flash_info[3].size;
                for (l = 0; l < CFG_MAX_FLASH_SECT; l++) {
-                       if (flash_info[3].start[l] != 0) {
+                       if (flash_info[3].start[l] != 0) {
                              flash_info[3].start[l] += flash_offset;
                        }
                }
@@ -378,7 +444,6 @@ int misc_init_r ()
                               CFG_MONITOR_BASE,
                               CFG_MONITOR_BASE + monitor_flash_len  - 1,
                               &flash_info[3]);
-       
        }
        return 0;
 }
@@ -503,7 +568,7 @@ static void move64 (unsigned long long *src, unsigned long long *dest)
 {
        asm ("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
             "stfd 0, 0(4)"     /* *dest  =  fpr0       */
-      : : : "fr0");            /* Clobbers fr0         */
+      : : : "fr0");            /* Clobbers fr0         */
        return;
 }
 
@@ -581,9 +646,9 @@ int mem_test_data (void)
                move64 (&(pattern[i]), pmem);
                move64 (pmem, &temp64);
 
-               /* hi = (temp64>>32) & 0xffffffff;          */
-               /* lo = temp64 & 0xffffffff;                */
-               /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
+               /* hi = (temp64>>32) & 0xffffffff;              */
+               /* lo = temp64 & 0xffffffff;                    */
+               /* printf("\ntemp64 = 0x%08x%08x", hi, lo);     */
 
                hi = (pattern[i] >> 32) & 0xffffffff;
                lo = pattern[i] & 0xffffffff;
@@ -856,11 +921,11 @@ int testdram (void)
 }
 #endif /* CFG_DRAM_TEST */
 
-/* ronen - the below functions are used by the bootm function           */
+/* ronen - the below functions are used by the bootm function          */
 /*  - we map the base register to fbe00000 (same mapping as in the LSP) */
 /*  - we turn off the RX gig dmas - to prevent the dma from overunning  */
-/*    the kernel data areas.                                            */
-/*  - we diable and invalidate the icache and dcache.                   */
+/*    the kernel data areas.                                           */
+/*  - we diable and invalidate the icache and dcache.                  */
 void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
 {
        u32 temp;
@@ -900,3 +965,38 @@ void board_prebootm_init ()
        flush_data_cache ();
        dcache_disable ();
 }
+
+int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+       unsigned int reset_sample_low;
+       unsigned int reset_sample_high;
+       unsigned int l, l1, l2;
+
+       GT_REG_READ(0x3c4, &reset_sample_low);
+       GT_REG_READ(0x3d4, &reset_sample_high);
+       printf("Reset configuration 0x%08x 0x%08x\n", reset_sample_low, reset_sample_high);
+
+       l2 = 0;
+       for (l=0; l<63; l++) {
+               if (show_config_tab[l][0] != 0) {
+                       printf("%14s:%1x ", show_config_tab[l],
+                              ((reset_sample_low >> (31 - (l & 0x1f)))) & 0x01);
+                       l2++;
+                       if ((l2 % 4) == 0)
+                               printf("\n");
+               } else {
+                       l1++;
+               }
+               if (l == 32)
+                       reset_sample_low = reset_sample_high;
+       }
+       printf("\n");
+
+       return(0);
+}
+
+U_BOOT_CMD(
+       show_config,    1,      1,      do_show_config,
+       "show_config - Show Marvell strapping register\n",
+       "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)\n"
+       );